powerpc/85xx: Rename P2040 id & SERDES to P2041

P2041 is the superset part that covers both P2040 & P2041.  The only
difference between the two devices is that P2041 supports 10g/XAUI and
has an L2 cache.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

arch/powerpc/cpu/mpc85xx/Makefile

@@ -78,8 +78,8 @@ COBJS-$(CONFIG_PCI)	+= pci.o
 COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
 
 # various SoC specific assignments
-COBJS-$(CONFIG_PPC_P2040) += p2040_ids.o
-COBJS-$(CONFIG_PPC_P2041) += p2040_ids.o
+COBJS-$(CONFIG_PPC_P2040) += p2041_ids.o
+COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o
 COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
 COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
 COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
@@ -111,7 +111,7 @@ COBJS-$(CONFIG_P1024)	+= p1021_serdes.o
 COBJS-$(CONFIG_P1025)	+= p1021_serdes.o
 COBJS-$(CONFIG_P2010)	+= p2020_serdes.o
 COBJS-$(CONFIG_P2020)	+= p2020_serdes.o
-COBJS-$(CONFIG_PPC_P2040) += p2040_serdes.o
+COBJS-$(CONFIG_PPC_P2040) += p2041_serdes.o
 COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o
 COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
 COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o