clk: stm32mp1: Add a clock entry for RNG1 device

Add an entry for allowing clock enablement for the random number
generator peripheral, RNG1.
Signed-off-by: NSughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: NPatrice Chotard <patrice.chotard@st.com>
Acked-by: NPatrick Delaunay <patrick.delaunay@st.com>

drivers/clk/clk_stm32mp1.c

@@ -563,6 +563,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
 	STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 10, GPIOK, _UNKNOWN_SEL),
 
 	STM32MP1_CLK_SET_CLR(RCC_MP_AHB5ENSETR, 0, GPIOZ, _UNKNOWN_SEL),
+	STM32MP1_CLK_SET_CLR(RCC_MP_AHB5ENSETR, 6, RNG1_K, _UNKNOWN_SEL),
 
 	STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 7, ETHCK_K, _ETH_SEL),
 	STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 8, ETHTX, _UNKNOWN_SEL),