Merge git://git.denx.de/u-boot-sh

arch/arm/dts/Makefile

@@ -410,6 +410,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
 	r8a7795-salvator-x.dtb \
 	r8a7796-m3ulcb.dtb \
 	r8a7796-salvator-x.dtb \
+	r8a77965-salvator-x.dtb \
 	r8a77970-eagle.dtb \
 	r8a77995-draak.dtb
 

arch/arm/dts/r8a7790-u-boot.dtsi

@@ -11,3 +11,11 @@
 &usb_extal_clk {
 	u-boot,dm-pre-reloc;
 };
+
+&pfc {
+	u-boot,dm-pre-reloc;
+};
+
+&rst {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/r8a7791-u-boot.dtsi

@@ -11,3 +11,11 @@
 &usb_extal_clk {
 	u-boot,dm-pre-reloc;
 };
+
+&pfc {
+	u-boot,dm-pre-reloc;
+};
+
+&rst {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/r8a7792-u-boot.dtsi

@@ -7,3 +7,11 @@
  */
 
 #include "r8a779x-u-boot.dtsi"
+
+&pfc {
+	u-boot,dm-pre-reloc;
+};
+
+&rst {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/r8a7793-u-boot.dtsi

@@ -11,3 +11,11 @@
 &usb_extal_clk {
 	u-boot,dm-pre-reloc;
 };
+
+&pfc {
+	u-boot,dm-pre-reloc;
+};
+
+&rst {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/r8a7794-u-boot.dtsi

@@ -11,3 +11,11 @@
 &usb_extal_clk {
 	u-boot,dm-pre-reloc;
 };
+
+&pfc {
+	u-boot,dm-pre-reloc;
+};
+
+&rst {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/r8a77965-salvator-x-u-boot.dts

+/*
+ * Device Tree Source extras for U-Boot for the M3N Salvator-XS board
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include "r8a77965-salvator-x.dts"
+#include "r8a77965-u-boot.dtsi"

arch/arm/dts/r8a77965-salvator-x.dts

+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Salvator-X board with R-Car M3-N
+ *
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ */
+
+/dts-v1/;
+#include "r8a77965.dtsi"
+#include "salvator-x.dtsi"
+
+/ {
+	model = "Renesas Salvator-X board based on r8a77965";
+	compatible = "renesas,salvator-x", "renesas,r8a77965";
+
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x78000000>;
+	};
+};

arch/arm/dts/r8a77965-u-boot.dtsi

+/*
+ * Device Tree Source extras for U-Boot on RCar R8A77965 SoC
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_clk {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/r8a779x-u-boot.dtsi

@@ -20,14 +20,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&pfc {
-	u-boot,dm-pre-reloc;
-};
-
 &prr {
 	u-boot,dm-pre-reloc;
 };
-
-&rst {
-	u-boot,dm-pre-reloc;
-};

arch/arm/dts/salvator-common.dtsi

@@ -257,6 +257,7 @@
 	pinctrl-names = "default";
 	renesas,no-ether-link;
 	phy-handle = <&phy0>;
+	reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 	status = "okay";
 
 	phy0: ethernet-phy@0 {

arch/arm/dts/ulcb.dtsi

@@ -156,6 +156,7 @@
 	pinctrl-names = "default";
 	renesas,no-ether-link;
 	phy-handle = <&phy0>;
+	reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 	status = "okay";
 
 	phy0: ethernet-phy@0 {

arch/arm/mach-rmobile/cpu_info.c

@@ -61,6 +61,7 @@ static const struct {
 	{ RMOBILE_CPU_TYPE_R8A7794, "R8A7794" },
 	{ RMOBILE_CPU_TYPE_R8A7795, "R8A7795" },
 	{ RMOBILE_CPU_TYPE_R8A7796, "R8A7796" },
+	{ RMOBILE_CPU_TYPE_R8A77965, "R8A77965" },
 	{ RMOBILE_CPU_TYPE_R8A77970, "R8A77970" },
 	{ RMOBILE_CPU_TYPE_R8A77995, "R8A77995" },
 	{ 0x0, "CPU" },

arch/arm/mach-rmobile/include/mach/rmobile.h

@@ -33,6 +33,7 @@
 #define RMOBILE_CPU_TYPE_R8A7794	0x4C
 #define RMOBILE_CPU_TYPE_R8A7795	0x4F
 #define RMOBILE_CPU_TYPE_R8A7796	0x52
+#define RMOBILE_CPU_TYPE_R8A77965	0x55
 #define RMOBILE_CPU_TYPE_R8A77970	0x54
 #define RMOBILE_CPU_TYPE_R8A77995	0x58
 

arch/arm/mach-rmobile/memmap-gen3.c

@@ -100,6 +100,7 @@ void rcar_gen3_memmap_fixup(void)
 		mem_map = r8a7795_mem_map;
 		break;
 	case RMOBILE_CPU_TYPE_R8A7796:
+	case RMOBILE_CPU_TYPE_R8A77965:
 		mem_map = r8a7796_mem_map;
 		break;
 	case RMOBILE_CPU_TYPE_R8A77970:

board/renesas/salvator-x/MAINTAINERS

@@ -5,3 +5,4 @@ F:	board/renesas/salvator-x/
 F:	include/configs/salvator-x.h
 F:	configs/r8a7795_salvator-x_defconfig
 F:	configs/r8a7796_salvator-x_defconfig
+F:	configs/r8a77965_salvator-x_defconfig

configs/r8a77965_salvator-x_defconfig

+CONFIG_ARM=y
+CONFIG_ARCH_RMOBILE=y
+CONFIG_SYS_TEXT_BASE=0x50000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_RCAR_GEN3=y
+CONFIG_R8A7796=y
+CONFIG_TARGET_SALVATOR_X=y
+CONFIG_DEFAULT_DEVICE_TREE="r8a77965-salvator-x-u-boot"
+CONFIG_SMBIOS_PRODUCT_NAME=""
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb"
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_UNIPHIER=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_ETH=y
+CONFIG_RENESAS_RAVB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_PFC=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SCIF_CONSOLE=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SMBIOS_MANUFACTURER=""

drivers/clk/renesas/r8a7796-cpg-mssr.c

@@ -323,11 +323,30 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = {
 	.get_pll_config		= r8a7796_get_pll_config,
 };
 
+static const struct cpg_mssr_info r8a77965_cpg_mssr_info = {
+	.core_clk		= r8a7796_core_clks,
+	.core_clk_size		= ARRAY_SIZE(r8a7796_core_clks),
+	.mod_clk		= r8a7796_mod_clks,
+	.mod_clk_size		= ARRAY_SIZE(r8a7796_mod_clks),
+	.mstp_table		= r8a7796_mstp_table,
+	.mstp_table_size	= ARRAY_SIZE(r8a7796_mstp_table),
+	.reset_node		= "renesas,r8a77965-rst",
+	.extalr_node		= "extalr",
+	.mod_clk_base		= MOD_CLK_BASE,
+	.clk_extal_id		= CLK_EXTAL,
+	.clk_extalr_id		= CLK_EXTALR,
+	.get_pll_config		= r8a7796_get_pll_config,
+};
+
 static const struct udevice_id r8a7796_clk_ids[] = {
 	{
 		.compatible	= "renesas,r8a7796-cpg-mssr",
 		.data		= (ulong)&r8a7796_cpg_mssr_info,
 	},
+	{
+		.compatible	= "renesas,r8a77965-cpg-mssr",
+		.data		= (ulong)&r8a77965_cpg_mssr_info,
+	},
 	{ }
 };
 

drivers/gpio/gpio-rcar.c

@@ -174,6 +174,7 @@ static int rcar_gpio_probe(struct udevice *dev)
 static const struct udevice_id rcar_gpio_ids[] = {
 	{ .compatible = "renesas,gpio-r8a7795" },
 	{ .compatible = "renesas,gpio-r8a7796" },
+	{ .compatible = "renesas,gpio-r8a77965" },
 	{ .compatible = "renesas,gpio-r8a77970" },
 	{ .compatible = "renesas,gpio-r8a77995" },
 	{ .compatible = "renesas,rcar-gen2-gpio" },

drivers/mmc/uniphier-sd.c

@@ -854,6 +854,7 @@ static const struct udevice_id uniphier_sd_match[] = {
 	{ .compatible = "renesas,sdhi-r8a7794", .data = 0 },
 	{ .compatible = "renesas,sdhi-r8a7795", .data = UNIPHIER_SD_CAP_64BIT },
 	{ .compatible = "renesas,sdhi-r8a7796", .data = UNIPHIER_SD_CAP_64BIT },
+	{ .compatible = "renesas,sdhi-r8a77965", .data = UNIPHIER_SD_CAP_64BIT },
 	{ .compatible = "renesas,sdhi-r8a77970", .data = UNIPHIER_SD_CAP_64BIT },
 	{ .compatible = "renesas,sdhi-r8a77995", .data = UNIPHIER_SD_CAP_64BIT },
 	{ .compatible = "socionext,uniphier-sdhc", .data = 0 },

drivers/net/ravb.c

@@ -658,6 +658,7 @@ int ravb_ofdata_to_platdata(struct udevice *dev)
 static const struct udevice_id ravb_ids[] = {
 	{ .compatible = "renesas,etheravb-r8a7795" },
 	{ .compatible = "renesas,etheravb-r8a7796" },
+	{ .compatible = "renesas,etheravb-r8a77965" },
 	{ .compatible = "renesas,etheravb-r8a77970" },
 	{ .compatible = "renesas,etheravb-r8a77995" },
 	{ .compatible = "renesas,etheravb-rcar-gen3" },

drivers/pinctrl/renesas/pfc.c

@@ -862,6 +862,9 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
 	{
 		.compatible = "renesas,pfc-r8a7796",
 		.data = SH_PFC_R8A7796,
+	}, {
+		.compatible = "renesas,pfc-r8a77965",
+		.data = SH_PFC_R8A7796,
 	},
 #endif
 #ifdef CONFIG_PINCTRL_PFC_R8A77970

drivers/usb/host/xhci-rcar.c

@@ -142,6 +142,7 @@ static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
 static const struct udevice_id xhci_rcar_ids[] = {
 	{ .compatible = "renesas,xhci-r8a7795" },
 	{ .compatible = "renesas,xhci-r8a7796" },
+	{ .compatible = "renesas,xhci-r8a77965" },
 	{ }
 };
 

include/dt-bindings/power/r8a77965-sysc.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77965_PD_CA57_CPU0		 0
+#define R8A77965_PD_CA57_CPU1		 1
+#define R8A77965_PD_A3VP		 9
+#define R8A77965_PD_CA57_SCU		12
+#define R8A77965_PD_CR7			13
+#define R8A77965_PD_A3VC		14
+#define R8A77965_PD_3DG_A		17
+#define R8A77965_PD_3DG_B		18
+#define R8A77965_PD_A3IR		24
+#define R8A77965_PD_A2VC1		26
+
+/* Always-on power area */
+#define R8A77965_PD_ALWAYS_ON		32
+
+#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */