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提交 807db88b 编写于 作者: M Matthias Fuchs 提交者： Tom Rini
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ppc4xx: remove VOH405 board 

Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd.eu>
上级 d5263304
展开全部 隐藏空白更改
内联 并排
Showing with 1 addition and 8521 deletion
arch/powerpc/cpu/ppc4xx/Kconfig
浏览文件 @ 807db88b
......@@ -134,9 +134,6 @@ config TARGET_PMC405DE
config TARGET_PMC440
bool "Support PMC440"
config TARGET_VOH405
bool "Support VOH405"
config TARGET_VOM405
bool "Support VOM405"
......@@ -223,7 +220,6 @@ source "board/esd/cpci405/Kconfig"
source "board/esd/plu405/Kconfig"
source "board/esd/pmc405de/Kconfig"
source "board/esd/pmc440/Kconfig"
source "board/esd/voh405/Kconfig"
source "board/esd/vom405/Kconfig"
source "board/esd/wuh405/Kconfig"
source "board/g2000/Kconfig"
......
board/esd/voh405/Kconfig 已删除 100644 → 0
浏览文件 @ d5263304
if TARGET_VOH405
config SYS_BOARD
default "voh405"
config SYS_VENDOR
default "esd"
config SYS_CONFIG_NAME
default "VOH405"
endif
board/esd/voh405/MAINTAINERS 已删除 100644 → 0
浏览文件 @ d5263304
VOH405 BOARD
M: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
S: Maintained
F: board/esd/voh405/
F: include/configs/VOH405.h
F: configs/VOH405_defconfig
board/esd/voh405/Makefile 已删除 100644 → 0
浏览文件 @ d5263304
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y = voh405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
board/esd/voh405/flash.c 已删除 100644 → 0
浏览文件 @ d5263304
/*
* (C) Copyright 2001
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/ppc4xx.h>
#include <asm/processor.h>
/*
* include common flash code (for esd boards)
*/
#include "../common/flash.c"
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (vu_long * addr, flash_info_t * info);
static void flash_get_offsets (ulong base, flash_info_t * info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
unsigned long size_b0;
int i;
uint pbcr;
unsigned long base_b0;
int size_val = 0;
/* Init: no FLASHes known */
for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
/* Setup offsets */
flash_get_offsets (-size_b0, &flash_info[0]);
/* Re-do sizing to get full correct info */
mtdcr(EBC0_CFGADDR, PB0CR);
pbcr = mfdcr(EBC0_CFGDATA);
mtdcr(EBC0_CFGADDR, PB0CR);
base_b0 = -size_b0;
switch (size_b0) {
case 1 << 20:
size_val = 0;
break;
case 2 << 20:
size_val = 1;
break;
case 4 << 20:
size_val = 2;
break;
case 8 << 20:
size_val = 3;
break;
case 16 << 20:
size_val = 4;
break;
}
pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
mtdcr(EBC0_CFGDATA, pbcr);
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
-CONFIG_SYS_MONITOR_LEN,
0xffffffff,
&flash_info[0]);
flash_info[0].size = size_b0;
return (size_b0);
}
board/esd/voh405/fpgadata.c 已删除 100644 → 0
浏览文件 @ d5263304
此差异已折叠。
board/esd/voh405/logo_320_240_4bpp.c 已删除 100644 → 0
浏览文件 @ d5263304
0x1f, 0x8b, 0x08, 0x08, 0x7f, 0x95, 0xab, 0x3f,
0x00, 0x03, 0x50, 0x50, 0x43, 0x5f, 0x53, 0x74,
0x61, 0x72, 0x74, 0x6c, 0x6f, 0x67, 0x6f, 0x5f,
0x31, 0x36, 0x67, 0x2e, 0x62, 0x6d, 0x70, 0x00,
0xed, 0x9b, 0xcb, 0x71, 0xe3, 0x38, 0x10, 0x86,
0x7b, 0xaa, 0xe6, 0xb6, 0x87, 0x2e, 0x4f, 0x08,
0x3e, 0xed, 0xdd, 0x09, 0x6c, 0x6d, 0xf9, 0x3a,
0x47, 0xa7, 0xe0, 0x10, 0xc6, 0x29, 0x38, 0x82,
0xad, 0x72, 0x0a, 0x4e, 0xc1, 0x29, 0x38, 0x05,
0xa7, 0xe0, 0xea, 0x0c, 0x30, 0x12, 0x89, 0x06,
0x1a, 0x4f, 0x3d, 0x2c, 0x01, 0x9c, 0xad, 0xff,
0xf3, 0x48, 0xa2, 0x44, 0x82, 0xf8, 0xd8, 0x20,
0x5e, 0x24, 0xe7, 0xdf, 0x9f, 0xbf, 0xfe, 0xa3,
0x85, 0x5f, 0xbb, 0xd7, 0xdf, 0xbb, 0xd7, 0x3f,
0xdf, 0x88, 0x64, 0xf7, 0xf9, 0x8d, 0xbe, 0x93,
0xf2, 0xe3, 0xaf, 0xf5, 0x65, 0xb9, 0xb9, 0xb9,
0xa1, 0xdb, 0xdb, 0x5b, 0xba, 0xbb, 0xbb, 0xa3,
0xfb, 0xfb, 0x7b, 0x7a, 0x78, 0x78, 0xa0, 0xc7,
0xc7, 0x47, 0x7a, 0x7a, 0x7a, 0xa2, 0xe7, 0xe7,
0x67, 0x7a, 0x79, 0x79, 0xa1, 0xd7, 0xd7, 0x57,
0x7a, 0x7b, 0x7b, 0xa3, 0xf7, 0xf7, 0x77, 0xfa,
0xf8, 0xf8, 0xa0, 0xcf, 0xcf, 0x4f, 0x72, 0xce,
0xed, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff,
0x02, 0xa1, 0x8b, 0x03, 0x3f, 0xf8, 0xc1, 0x0f,
0x7e, 0xf0, 0xfb, 0xb3, 0xfd, 0xf6, 0x59, 0xf3,
0x66, 0xfd, 0xc2, 0xe6, 0x7d, 0xc5, 0x49, 0x7e,
0xfb, 0xcd, 0x84, 0x59, 0xd8, 0x1d, 0x48, 0x30,
0xc7, 0x6f, 0xd9, 0x88, 0x77, 0x7f, 0x3b, 0x41,
0xd7, 0x0d, 0xe1, 0x14, 0xbf, 0x45, 0x88, 0x97,
0x7f, 0xb2, 0x38, 0xb4, 0x05, 0x67, 0xf8, 0x2d,
0x3a, 0xb2, 0x2a, 0x2e, 0xff, 0xcb, 0xb0, 0x23,
0x38, 0xc1, 0x6f, 0xd5, 0xf3, 0x21, 0x5c, 0xdf,
0xa4, 0x99, 0x68, 0xbc, 0x9f, 0x04, 0xab, 0xf5,
0x4d, 0x5c, 0x4f, 0x70, 0xb8, 0xdf, 0x6a, 0xb2,
0x48, 0xad, 0x7e, 0xde, 0xb2, 0x51, 0xc2, 0xc3,
0xfd, 0x28, 0x37, 0xf3, 0xae, 0x8d, 0x64, 0xa3,
0xfd, 0x24, 0x96, 0xa9, 0xfa, 0xf9, 0x00, 0xd6,
0xd3, 0x8d, 0xf6, 0xb3, 0xe1, 0xd3, 0x0f, 0x31,
0xe6, 0x93, 0xfd, 0xba, 0xd9, 0x6d, 0xc0, 0x8f,
0x4c, 0xc0, 0x42, 0xfc, 0x7a, 0x01, 0x1c, 0xeb,
0x27, 0xb6, 0x5e, 0xc4, 0x4f, 0x97, 0xfe, 0x3c,
0xcf, 0x2f, 0x0d, 0x5f, 0xee, 0x57, 0x4b, 0x39,
0xd4, 0x2f, 0x0b, 0x5f, 0x5c, 0x68, 0x17, 0xf0,
0x58, 0xbf, 0x6a, 0xd8, 0xba, 0x01, 0x1c, 0xea,
0x97, 0x15, 0x6f, 0xe1, 0x27, 0xae, 0x60, 0xa4,
0x5f, 0x5e, 0xbc, 0x66, 0xa9, 0x59, 0xc0, 0x43,
0xfd, 0xea, 0x51, 0x33, 0xab, 0xca, 0xb4, 0x23,
0xfd, 0x7a, 0x35, 0xbb, 0x55, 0xc0, 0x98, 0x5f,
0xfe, 0x39, 0x7e, 0xbb, 0x21, 0x8a, 0x0e, 0x9d,
0xd7, 0x8d, 0x74, 0x58, 0xef, 0xc7, 0xf7, 0x93,
0xdb, 0xbf, 0x5d, 0x56, 0x9c, 0xf8, 0x91, 0xce,
0xdc, 0x7c, 0xa2, 0xc9, 0x7e, 0xe4, 0x0d, 0xd4,
0x4f, 0x38, 0x8e, 0x9d, 0xc3, 0x8a, 0x89, 0x7e,
0x6c, 0xfc, 0x74, 0xe6, 0x46, 0xce, 0x2c, 0xcc,
0xf5, 0x0b, 0x33, 0x36, 0xeb, 0x27, 0x9b, 0xf2,
0x5b, 0xcf, 0x37, 0xbd, 0x2e, 0x54, 0xfa, 0x51,
0x79, 0x29, 0xa1, 0xea, 0xb7, 0xac, 0x89, 0x5f,
0xf9, 0xb4, 0x23, 0xe9, 0xc5, 0xcf, 0x2f, 0x48,
0x33, 0x7e, 0x79, 0xea, 0x4a, 0xae, 0x9c, 0xad,
0x0a, 0x87, 0xb4, 0x5b, 0x32, 0x0d, 0xbc, 0x6d,
0xeb, 0xcd, 0x51, 0x1f, 0xe5, 0x17, 0x95, 0x8e,
0xf5, 0xe3, 0xb0, 0xc8, 0xd9, 0x3a, 0xf3, 0xfd,
0x4b, 0x7e, 0x49, 0xfd, 0x50, 0xb7, 0xa2, 0x7e,
0xb4, 0xfc, 0xd6, 0x5d, 0x67, 0xc5, 0x23, 0x45,
0x71, 0x7d, 0xc5, 0x8f, 0xf4, 0x5a, 0x41, 0x6c,
0x5f, 0xd6, 0x98, 0x9e, 0xe4, 0x97, 0x9c, 0xa0,
0x14, 0x5b, 0xd0, 0xa2, 0x03, 0x3f, 0xd9, 0x4f,
0x7c, 0x36, 0xa1, 0x1a, 0x84, 0x33, 0xdd, 0x1d,
0xac, 0x1f, 0x1c, 0x96, 0xfd, 0xaf, 0xc1, 0x4f,
0x3f, 0xc9, 0x4e, 0xac, 0xcf, 0xf2, 0x2b, 0xa7,
0xe0, 0x47, 0x74, 0xd5, 0xb9, 0x9f, 0x1e, 0x58,
0x38, 0xd4, 0xf0, 0xdd, 0x5c, 0x37, 0xa9, 0xfa,
0x1d, 0xaa, 0xbf, 0xe7, 0x21, 0x66, 0x9f, 0xb6,
0x00, 0xd4, 0x94, 0x5d, 0x72, 0x0c, 0x62, 0x44,
0xe2, 0x1a, 0x3a, 0xe4, 0x57, 0x36, 0x12, 0x7d,
0xf2, 0x3a, 0x9a, 0x16, 0xa7, 0x3d, 0x25, 0x4d,
0xce, 0x13, 0xfd, 0x58, 0x77, 0xc3, 0x59, 0xa6,
0x72, 0x19, 0xbf, 0xf3, 0x09, 0x7e, 0xf1, 0x42,
0xb0, 0xcd, 0x48, 0x74, 0x13, 0x73, 0x29, 0x67,
0x82, 0x9f, 0x5b, 0x4b, 0xf2, 0x9a, 0x7e, 0xc2,
0xbe, 0x02, 0x53, 0xda, 0xd8, 0x2d, 0x27, 0x3d,
0xfb, 0x2a, 0xb9, 0x16, 0x97, 0x6d, 0x63, 0x32,
0x3f, 0x93, 0xa7, 0x89, 0xea, 0x25, 0xfc, 0xa8,
0xe1, 0xb7, 0xef, 0x34, 0xc9, 0xfa, 0x49, 0xdb,
0xcf, 0x5d, 0xd3, 0x8f, 0xaa, 0x7e, 0xe2, 0xf3,
0x26, 0x13, 0xe4, 0xc2, 0x8f, 0xb5, 0xa5, 0xab,
0xfa, 0x91, 0xc5, 0x24, 0xcc, 0xfc, 0xc2, 0xfe,
0x3a, 0x7e, 0x12, 0xfd, 0xfc, 0x4b, 0x7b, 0xe4,
0xe8, 0x47, 0xd2, 0xf6, 0x0b, 0xe1, 0xba, 0xbc,
0x1f, 0x8b, 0xcf, 0x3a, 0xf5, 0xd3, 0x89, 0x47,
0xf0, 0x93, 0x8a, 0x9f, 0xd3, 0x9e, 0xb6, 0xea,
0x27, 0x97, 0xf0, 0x93, 0xa3, 0xfd, 0x78, 0x96,
0x1f, 0x3b, 0x56, 0x3f, 0x3d, 0x65, 0xfd, 0x29,
0x68, 0xeb, 0x07, 0xb9, 0x8e, 0x9f, 0xe3, 0x6b,
0xfa, 0xed, 0x0d, 0xcf, 0xf1, 0xe3, 0xa8, 0xd9,
0x6c, 0xff, 0xcc, 0x6f, 0x76, 0xb5, 0xf1, 0x2b,
0x0f, 0x21, 0xf5, 0x5b, 0xa2, 0x47, 0xd5, 0xf2,
0x75, 0x2e, 0x94, 0x6f, 0x18, 0x14, 0xd6, 0xfd,
0x5c, 0xee, 0x97, 0xe4, 0xfc, 0x05, 0x3f, 0x72,
0x99, 0x9f, 0x39, 0x15, 0xad, 0x9f, 0x56, 0x69,
0xeb, 0xa7, 0x3b, 0xcf, 0xca, 0x33, 0xef, 0x7f,
0x35, 0x9e, 0xe7, 0xfa, 0x91, 0xb8, 0xd2, 0x2f,
0x6f, 0x5f, 0x8e, 0xf0, 0x2b, 0xc6, 0x2f, 0x72,
0x21, 0x3f, 0x52, 0x13, 0xed, 0x0f, 0x54, 0x26,
0xb6, 0xcf, 0xc4, 0x55, 0xbf, 0x38, 0xca, 0x8a,
0x3e, 0x7e, 0x29, 0x0a, 0x6b, 0x07, 0x73, 0x8e,
0x9f, 0xf8, 0xae, 0xc2, 0xfb, 0xed, 0xf1, 0xb9,
0x2c, 0xfd, 0x9b, 0x0e, 0x89, 0x25, 0x9c, 0x53,
0xc6, 0x8f, 0x73, 0xbf, 0x38, 0x90, 0x16, 0x33,
0x60, 0x8d, 0x53, 0x99, 0xba, 0x9f, 0x06, 0xaa,
0xee, 0xc7, 0xb9, 0x1f, 0x7b, 0x3f, 0x9f, 0xd7,
0xb1, 0x7e, 0xe9, 0x15, 0x4c, 0xe3, 0xc9, 0x1a,
0x86, 0x90, 0xf2, 0x14, 0xbf, 0x0e, 0xbd, 0xbb,
0xfb, 0xa1, 0xdf, 0x0d, 0xd9, 0x54, 0x1b, 0xc7,
0x6a, 0xe6, 0x97, 0xf2, 0xeb, 0x53, 0xf8, 0xd9,
0xdd, 0xe7, 0x79, 0xcb, 0x0c, 0xbf, 0x6c, 0x04,
0x6f, 0xf2, 0x2a, 0x32, 0xa7, 0xaf, 0xf9, 0xf9,
0x35, 0xa6, 0xb3, 0x89, 0xeb, 0xd8, 0x6e, 0x91,
0xfb, 0x85, 0x1e, 0x62, 0xd9, 0xbf, 0xa6, 0x0f,
0x15, 0xb2, 0xf8, 0xa1, 0x4f, 0x3b, 0x16, 0xdc,
0xf4, 0x2b, 0x6e, 0x3d, 0x44, 0xbf, 0x46, 0x0e,
0x76, 0x05, 0x9f, 0xa2, 0xd7, 0x29, 0x5f, 0xae,
0x5b, 0x85, 0xa5, 0xc9, 0xf7, 0x67, 0x8a, 0xfb,
0x5b, 0xf9, 0x9d, 0xae, 0x4a, 0xd2, 0x9a, 0x1f,
0x2f, 0xdb, 0x5f, 0xc1, 0x2f, 0x2f, 0xe0, 0xdc,
0xaf, 0xd2, 0xd0, 0x0c, 0xf5, 0xcb, 0x35, 0x24,
0x5d, 0x38, 0xf6, 0xfa, 0xee, 0xf5, 0xfc, 0xb2,
0x02, 0xce, 0x6e, 0x54, 0xd7, 0x52, 0x8e, 0xf5,
0xcb, 0x0a, 0x58, 0x92, 0xcf, 0x0d, 0x3c, 0x7f,
0xd0, 0x3f, 0xe8, 0xea, 0x11, 0x8d, 0xf5, 0x4b,
0x03, 0x98, 0x3c, 0xc7, 0xb1, 0x89, 0xe7, 0x5f,
0xd2, 0xe7, 0x73, 0xc4, 0x7e, 0x34, 0xe6, 0x05,
0x83, 0xfd, 0xec, 0xe3, 0x61, 0x49, 0xaf, 0xd1,
0x78, 0x40, 0x6c, 0xb4, 0x9f, 0xef, 0xdf, 0x6d,
0x4f, 0xb2, 0xa9, 0xe7, 0xc3, 0xe2, 0x8c, 0x3c,
0x98, 0x71, 0xd4, 0xde, 0x82, 0x9f, 0x29, 0xe1,
0xf8, 0xd6, 0x1c, 0xa3, 0x8e, 0xf7, 0xf3, 0x82,
0xec, 0xd5, 0xd6, 0x09, 0x5c, 0x33, 0xd1, 0x04,
0x3f, 0x17, 0x67, 0xfe, 0xea, 0xd9, 0x19, 0x93,
0x4d, 0xf0, 0x73, 0x7a, 0x2d, 0x4f, 0x74, 0xc2,
0xd5, 0xde, 0x74, 0x8a, 0xdf, 0x3a, 0x2a, 0xde,
0x4d, 0xd7, 0xf6, 0x86, 0xcd, 0x2b, 0x72, 0x13,
0xfd, 0xd6, 0x99, 0x21, 0x89, 0x30, 0x1d, 0x78,
0x00, 0x7f, 0x96, 0x5f, 0x6d, 0xea, 0xb2, 0x29,
0xbf, 0x23, 0x81, 0x1f, 0xfc, 0xe0, 0x07, 0x3f,
0xf8, 0x6d, 0xd3, 0x0f, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x5c, 0x8e, 0xdf,
0xe3, 0xb7, 0xe4, 0x39, 0x76, 0x96, 0x00, 0x00,
board/esd/voh405/logo_640_480_24bpp.c 已删除 100644 → 0
浏览文件 @ d5263304
此差异已折叠。
board/esd/voh405/voh405.c 已删除 100644 → 0
浏览文件 @ d5263304
/*
* (C) Copyright 2001-2004
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <command.h>
#include <malloc.h>
/* ------------------------------------------------------------------------- */
#if 0
#define FPGA_DEBUG
#endif
extern void lxt971_no_sleep(void);
/* fpga configuration data - gzip compressed and generated by bin2c */
const unsigned char fpgadata[] =
{
#include "fpgadata.c"
};
/*
* include common fpga code (for esd boards)
*/
#include "../common/fpga.c"
/* logo bitmap data - gzip compressed and generated by bin2c */
unsigned char logo_bmp_320[] =
{
#include "logo_320_240_4bpp.c"
};
unsigned char logo_bmp_640[] =
{
#include "logo_640_480_24bpp.c"
};
/*
* include common lcd code (for esd boards)
*/
#include "../common/lcd.c"
#include "../common/s1d13704_320_240_4bpp.h"
#include "../common/s1d13806_320_240_4bpp.h"
#include "../common/s1d13806_640_480_16bpp.h"
int board_early_init_f (void)
{
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
* IRQ 16 405GP internally generated; active low; level sensitive
* IRQ 17-24 RESERVED
* IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
* IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
* IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
* IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
* IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
* IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
*/
mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
mtdcr(UIC0ER, 0x00000000); /* disable all ints */
mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
mtdcr(UIC0PR, 0xFFFFFFB5); /* set int polarities */
mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
/*
* EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
*/
mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
return 0;
}
int misc_init_r (void)
{
unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
unsigned short *lcd_contrast =
(unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL + 4);
unsigned short *lcd_backlight =
(unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL + 6);
unsigned char *dst;
ulong len = sizeof(fpgadata);
int status;
int index;
int i;
char *str;
dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
printf ("GUNZIP ERROR - must RESET board to recover\n");
do_reset (NULL, 0, 0, NULL);
}
status = fpga_boot(dst, len);
if (status != 0) {
printf("\nFPGA: Booting failed ");
switch (status) {
case ERROR_FPGA_PRG_INIT_LOW:
printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
break;
case ERROR_FPGA_PRG_INIT_HIGH:
printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
break;
case ERROR_FPGA_PRG_DONE:
printf("(Timeout: DONE not high after programming FPGA)\n ");
break;
}
/* display infos on fpgaimage */
index = 15;
for (i=0; i<4; i++) {
len = dst[index];
printf("FPGA: %s\n", &(dst[index+1]));
index += len+3;
}
putc ('\n');
/* delayed reboot */
for (i=20; i>0; i--) {
printf("Rebooting in %2d seconds \r",i);
for (index=0;index<1000;index++)
udelay(1000);
}
putc ('\n');
do_reset(NULL, 0, 0, NULL);
}
puts("FPGA: ");
/* display infos on fpgaimage */
index = 15;
for (i=0; i<4; i++) {
len = dst[index];
printf("%s ", &(dst[index+1]));
index += len+3;
}
putc ('\n');
free(dst);
/*
* Reset FPGA via FPGA_INIT pin
*/
out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) | FPGA_INIT); /* setup FPGA_INIT as output */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~FPGA_INIT); /* reset low */
udelay(1000); /* wait 1ms */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | FPGA_INIT); /* reset high */
udelay(1000); /* wait 1ms */
/*
* Reset external DUARTs
*/
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */
udelay(10); /* wait 10us */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */
udelay(1000); /* wait 1ms */
/*
* Set NAND-FLASH GPIO signals to default
*/
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE));
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CONFIG_SYS_NAND_CE);
/*
* Setup EEPROM write protection
*/
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CONFIG_SYS_EEPROM_WP);
out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) | CONFIG_SYS_EEPROM_WP);
/*
* Enable interrupts in exar duart mcr[3]
*/
out_8(duart0_mcr, 0x08);
out_8(duart1_mcr, 0x08);
/*
* Init lcd interface and display logo
*/
str = getenv("bd_type");
if (strcmp(str, "voh405_bw") == 0) {
lcd_setup(0, 1);
lcd_init((uchar *)CONFIG_SYS_LCD_SMALL_REG, (uchar *)CONFIG_SYS_LCD_SMALL_MEM,
regs_13704_320_240_4bpp,
sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
logo_bmp_320, sizeof(logo_bmp_320));
} else if (strcmp(str, "voh405_bwbw") == 0) {
lcd_setup(0, 1);
lcd_init((uchar *)CONFIG_SYS_LCD_SMALL_REG, (uchar *)CONFIG_SYS_LCD_SMALL_MEM,
regs_13704_320_240_4bpp,
sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
logo_bmp_320, sizeof(logo_bmp_320));
lcd_setup(1, 1);
lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG, (uchar *)CONFIG_SYS_LCD_BIG_MEM,
regs_13806_320_240_4bpp,
sizeof(regs_13806_320_240_4bpp)/sizeof(regs_13806_320_240_4bpp[0]),
logo_bmp_320, sizeof(logo_bmp_320));
} else if (strcmp(str, "voh405_bwc") == 0) {
lcd_setup(0, 1);
lcd_init((uchar *)CONFIG_SYS_LCD_SMALL_REG, (uchar *)CONFIG_SYS_LCD_SMALL_MEM,
regs_13704_320_240_4bpp,
sizeof(regs_13704_320_240_4bpp)/sizeof(regs_13704_320_240_4bpp[0]),
logo_bmp_320, sizeof(logo_bmp_320));
lcd_setup(1, 0);
lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG, (uchar *)CONFIG_SYS_LCD_BIG_MEM,
regs_13806_640_480_16bpp,
sizeof(regs_13806_640_480_16bpp)/sizeof(regs_13806_640_480_16bpp[0]),
logo_bmp_640, sizeof(logo_bmp_640));
} else {
printf("Unsupported bd_type defined (%s) -> No display configured!\n", str);
return 0;
}
/*
* Set invert bit in small lcd controller
*/
out_8((unsigned char *)(CONFIG_SYS_LCD_SMALL_REG + 2),
in_8((unsigned char *)(CONFIG_SYS_LCD_SMALL_REG + 2)) | 0x01);
/*
* Set default contrast voltage on epson vga controller
*/
out_be16(lcd_contrast, 0x4646);
/*
* Enable backlight
*/
out_be16(lcd_backlight, 0xffff);
/*
* Enable external I2C bus
*/
out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) | CONFIG_SYS_IIC_ON);
return (0);
}
/*
* Check Board Identity:
*/
int checkboard (void)
{
char str[64];
int i = getenv_f("serial#", str, sizeof(str));
puts ("Board: ");
if (i == -1) {
puts ("### No HW ID - assuming VOH405");
} else {
puts(str);
}
if (getenv_f("bd_type", str, sizeof(str)) != -1) {
printf(" (%s)", str);
} else {
puts(" (Missing bd_type!)");
}
putc ('\n');
return 0;
}
#ifdef CONFIG_IDE_RESET
#define FPGA_MODE (CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL)
void ide_set_reset(int on)
{
/*
* Assert or deassert CompactFlash Reset Pin
*/
if (on) { /* assert RESET */
out_be16((void *)FPGA_MODE,
in_be16((void *)FPGA_MODE) & ~CONFIG_SYS_FPGA_CTRL_CF_RESET);
} else { /* release RESET */
out_be16((void *)FPGA_MODE,
in_be16((void *)FPGA_MODE) | CONFIG_SYS_FPGA_CTRL_CF_RESET);
}
}
#endif /* CONFIG_IDE_RESET */
#if defined(CONFIG_RESET_PHY_R)
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
/*
* Disable sleep mode in LXT971
*/
lxt971_no_sleep();
#endif
}
#endif
#if defined(CONFIG_SYS_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state
* 0: disable write
* 1: enable write
* Returns: -1: wrong device address
* 0: dis-/en- able done
* 0/1: current state if <state> was -1.
*/
int eeprom_write_enable (unsigned dev_addr, int state)
{
if (CONFIG_SYS_I2C_EEPROM_ADDR != dev_addr) {
return -1;
} else {
switch (state) {
case 1:
/* Enable write access, clear bit GPIO0. */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP);
state = 0;
break;
case 0:
/* Disable write access, set bit GPIO0. */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CONFIG_SYS_EEPROM_WP);
state = 0;
break;
default:
/* Read current status back. */
state = (0 == (in_be32((void*)GPIO0_OR) & CONFIG_SYS_EEPROM_WP));
break;
}
}
return state;
}
int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int query = argc == 1;
int state = 0;
if (query) {
/* Query write access state. */
state = eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR, -1);
if (state < 0) {
puts ("Query of write access state failed.\n");
} else {
printf ("Write access for device 0x%0x is %sabled.\n",
CONFIG_SYS_I2C_EEPROM_ADDR, state ? "en" : "dis");
state = 0;
}
} else {
if ('0' == argv[1][0]) {
/* Disable write access. */
state = eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR, 0);
} else {
/* Enable write access. */
state = eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR, 1);
}
if (state < 0) {
puts ("Setup of write access state failed.\n");
}
}
return state;
}
U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
"Enable / disable / query EEPROM write access",
""
);
#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */
configs/VOH405_defconfig 已删除 100644 → 0
浏览文件 @ d5263304
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_VOH405=y
doc/README.scrapyard
浏览文件 @ 807db88b
......@@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
VOH405 ppc4xx 405ep - - Matthias Fuchs <matthias.fuchs@esd.eu>
PMC405 ppc4xx 405gp - - Matthias Fuchs <matthias.fuchs@esd.eu>
PCI405 ppc4xx 405gp - - Matthias Fuchs <matthias.fuchs@esd.eu>
OCRTC ppc4xx 405gpr - - Matthias Fuchs <matthias.fuchs@esd.eu>
......
include/configs/VOH405.h 已删除 100644 → 0
浏览文件 @ d5263304
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