arm: Provide common PSCI based reset handler

Most armv8 systems have PSCI support enabled in EL3, either through
ARM Trusted Firmware or other firmware.

On these systems, we do not need to implement system reset manually,
but can instead rely on higher level firmware to deal with it.

The exclude list seems excessive right now, but NXP is working on
providing an in-tree PSCI implementation, so that all NXP systems
can eventually use PSCI as well.
Signed-off-by: NAlexander Graf <agraf@suse.de>
[agraf: fix meson]
Reviewed-by: NSimon Glass <sjg@chromium.org>

arch/arm/cpu/armv8/Kconfig

@@ -21,4 +21,22 @@ config ARMV8_SPIN_TABLE
 	    - Reserve the code for the spin-table and the release address
 	      via a /memreserve/ region in the Device Tree.
 
+config PSCI_RESET
+	bool "Use PSCI for reset and shutdown"
+	default y
+	depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
+		   !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
+		   !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
+		   !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
+		   !TARGET_LS1043ARDB && !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && \
+		   !TARGET_S32V234EVB
+	help
+	  Most armv8 systems have PSCI support enabled in EL3, either through
+	  ARM Trusted Firmware or other firmware.
+
+	  On these systems, we do not need to implement system reset manually,
+	  but can instead rely on higher level firmware to deal with it.
+
+	  Select Y here to make use of PSCI calls for system reset
+
 endif

arch/arm/cpu/armv8/fwcall.c

@@ -112,3 +112,10 @@ void __noreturn psci_system_off(void)
 	while (1)
 		;
 }
+
+#ifdef CONFIG_PSCI_RESET
+void reset_misc(void)
+{
+	psci_system_reset();
+}
+#endif /* CONFIG_PSCI_RESET */

board/xilinx/zynqmp/zynqmp.c

@@ -427,8 +427,3 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 	return 0;
 }
 #endif
-
-void reset_misc(void)
-{
-	psci_system_reset();
-}