提交 80433c9a 编写于 作者: S Simon Glass 提交者: Albert ARIBAUD

arm: Move CP15 init out of cpu_init_crit()

Some SOCs have do not start up with their 'main' CPU. The first U-Boot
code may then be executed with a CPU which does not have a CP15, or not a
useful one.

Here we split the initialization of CP15 into a separate call, which can
be performed later if required.

Once the main CPU is running, you should call cpu_init_cp15() to perform
this init as early as possible.

Existing ARMv7 boards which define CONFIG_SKIP_LOWLEVEL_INIT should not
need to change, this CP15 init is still skipped in that case. The only
impact for these boards is that the cpu_init_cp15() will be available
even if it is never used on these boards.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>
上级 210576fc
......@@ -162,6 +162,7 @@ reset:
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_cp15
bl cpu_init_crit
#endif
......@@ -299,17 +300,16 @@ jump_2_ram:
_board_init_r_ofs:
.word board_init_r - _start
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/*************************************************************************
*
* CPU_init_critical registers
* cpu_init_cp15
*
* setup important registers
* setup memory timing
* Setup CP15 registers (cache, MMU, TLBs). The I-cache is turned on unless
* CONFIG_SYS_ICACHE_OFF is defined.
*
*************************************************************************/
cpu_init_crit:
.globl cpu_init_cp15
cpu_init_cp15:
/*
* Invalidate L1 I/D
*/
......@@ -334,7 +334,19 @@ cpu_init_crit:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache
#endif
mcr p15, 0, r0, c1, c0, 0
mov pc, lr @ back to my caller
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************/
cpu_init_crit:
/*
* Jump to board specific initialization...
* The Mask ROM will have already initialized
......
......@@ -46,6 +46,9 @@ extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */
int cpu_init(void);
int cleanup_before_linux(void);
/* Set up ARMv7 MMU, caches and TLBs */
void cpu_init_cp15(void);
/* cpu/.../arch/cpu.c */
int arch_cpu_init(void);
int arch_misc_init(void);
......
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