arm: mach-omap2: cache: Explicitly enable I cache

omap-common cache enabling sequence relies on cpu_init_cp15()
(inside start.S) for enabling I-caches. But cpu_init_cp15()
can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
enable I-caches if not enabled already.
Debugged-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: NSteve Kipisz <s-kipisz2@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Tested-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

arch/arm/mach-omap2/omap-cache.c

@@ -44,7 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void enable_caches(void)
 {
-	/* Enable D-cache. I-cache is already enabled in start.S */
+
+	/* Enable I cache if not enabled */
+	if (!icache_status())
+		icache_enable();
+
 	dcache_enable();
 }