未验证 提交 748b5b34 编写于 作者: M Miquel Raynal 提交者: Maxime Ripard

sunxi: move the NAND parameters to Kconfig

Move the NAND parameters from defconfig files to Kconfig for SUNXI
architecture only. Fort now only the CHIP pro is migrated.

It would have been better to convert this defconfig entry to Kconfig for
all supported machines/architectures but it has been abandoned due to a
fairly high amount of errors reported by the moveconfig.py tool. This is
due to defines quite often being multiplications of values/other defines
not correctly handled.
Signed-off-by: NMiquel Raynal <miquel.raynal@bootlin.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
上级 b56052f4
......@@ -4,7 +4,9 @@ CONFIG_MACH_SUN5I=y
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro"
CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCK_SIZE=0x40000,SYS_NAND_PAGE_SIZE=4096,SYS_NAND_OOBSIZE=256"
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_OOBSIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100
CONFIG_SPL=y
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
......
......@@ -168,6 +168,28 @@ config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
comment "Generic NAND options"
config SYS_NAND_BLOCK_SIZE
hex "NAND chip eraseblock size"
depends on ARCH_SUNXI
help
Number of data bytes in one eraseblock for the NAND chip on the
board. This is the multiple of NAND_PAGE_SIZE and the number of
pages.
config SYS_NAND_PAGE_SIZE
hex "NAND chip page size"
depends on ARCH_SUNXI
help
Number of data bytes in one page for the NAND chip on the
board, not including the OOB area.
config SYS_NAND_OOBSIZE
hex "NAND chip OOB size"
depends on ARCH_SUNXI
help
Number of bytes in the Out-Of-Band area for the NAND chip on
the board.
# Enhance depends when converting drivers to Kconfig which use this config
# option (mxc_nand, ndfc, omap_gpmc).
config SYS_NAND_BUSWIDTH_16BIT
......
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