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6ca9da4d
编写于
1月 03, 2010
作者:
W
Wolfgang Denk
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'master' of
git://git.denx.de/u-boot-ppc4xx
上级
87d93a1b
be34fef7
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
53 addition
and
52 deletion
+53
-52
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.c
+38
-35
board/sandburst/common/ppc440gx_i2c.h
board/sandburst/common/ppc440gx_i2c.h
+15
-15
include/configs/alpr.h
include/configs/alpr.h
+0
-2
未找到文件。
board/sandburst/common/ppc440gx_i2c.c
浏览文件 @
6ca9da4d
...
@@ -31,6 +31,7 @@
...
@@ -31,6 +31,7 @@
#include <i2c.h>
#include <i2c.h>
#include <command.h>
#include <command.h>
#include "ppc440gx_i2c.h"
#include "ppc440gx_i2c.h"
#include <asm-ppc/io.h>
#ifdef CONFIG_I2C_BUS1
#ifdef CONFIG_I2C_BUS1
...
@@ -47,16 +48,18 @@
...
@@ -47,16 +48,18 @@
static
uchar
i2c_no_probes
[]
=
CONFIG_SYS_I2C_NOPROBES
;
static
uchar
i2c_no_probes
[]
=
CONFIG_SYS_I2C_NOPROBES
;
#endif
#endif
static
struct
ppc4xx_i2c
*
i2c
=
(
struct
ppc4xx_i2c
*
)
I2C_REGISTERS_BUS1_BASE_ADDRESS
;
static
void
_i2c_bus1_reset
(
void
)
static
void
_i2c_bus1_reset
(
void
)
{
{
int
i
,
status
;
int
i
,
status
;
/* Reset status register */
/* Reset status register */
/* write 1 in SCMP and IRQA to clear these fields */
/* write 1 in SCMP and IRQA to clear these fields */
out8
(
IIC_STS1
,
0x0A
);
out
_
8
(
IIC_STS1
,
0x0A
);
/* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
/* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
out8
(
IIC_EXTSTS1
,
0x8F
);
out
_
8
(
IIC_EXTSTS1
,
0x8F
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
/*
/*
...
@@ -66,36 +69,36 @@ static void _i2c_bus1_reset (void)
...
@@ -66,36 +69,36 @@ static void _i2c_bus1_reset (void)
i
=
10
;
i
=
10
;
do
{
do
{
/* Get status */
/* Get status */
status
=
in8
(
IIC_STS1
);
status
=
in
_
8
(
IIC_STS1
);
udelay
(
500
);
/* 500us */
udelay
(
500
);
/* 500us */
i
--
;
i
--
;
}
while
((
status
&
IIC_STS_PT
)
&&
(
i
>
0
));
}
while
((
status
&
IIC_STS_PT
)
&&
(
i
>
0
));
/* Soft reset controller */
/* Soft reset controller */
status
=
in8
(
IIC_XTCNTLSS1
);
status
=
in
_
8
(
IIC_XTCNTLSS1
);
out8
(
IIC_XTCNTLSS1
,
(
status
|
IIC_XTCNTLSS_SRST
));
out
_
8
(
IIC_XTCNTLSS1
,
(
status
|
IIC_XTCNTLSS_SRST
));
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
/* make sure where in initial state, data hi, clock hi */
/* make sure where in initial state, data hi, clock hi */
out8
(
IIC_DIRECTCNTL1
,
0xC
);
out
_
8
(
IIC_DIRECTCNTL1
,
0xC
);
for
(
i
=
0
;
i
<
10
;
i
++
)
{
for
(
i
=
0
;
i
<
10
;
i
++
)
{
if
((
in8
(
IIC_DIRECTCNTL1
)
&
0x3
)
!=
0x3
)
{
if
((
in
_
8
(
IIC_DIRECTCNTL1
)
&
0x3
)
!=
0x3
)
{
/* clock until we get to known state */
/* clock until we get to known state */
out8
(
IIC_DIRECTCNTL1
,
0x8
);
/* clock lo */
out
_
8
(
IIC_DIRECTCNTL1
,
0x8
);
/* clock lo */
udelay
(
100
);
/* 100us */
udelay
(
100
);
/* 100us */
out8
(
IIC_DIRECTCNTL1
,
0xC
);
/* clock hi */
out
_
8
(
IIC_DIRECTCNTL1
,
0xC
);
/* clock hi */
udelay
(
100
);
/* 100us */
udelay
(
100
);
/* 100us */
}
else
{
}
else
{
break
;
break
;
}
}
}
}
/* send start condition */
/* send start condition */
out8
(
IIC_DIRECTCNTL1
,
0x4
);
out
_
8
(
IIC_DIRECTCNTL1
,
0x4
);
udelay
(
1000
);
/* 1ms */
udelay
(
1000
);
/* 1ms */
/* send stop condition */
/* send stop condition */
out8
(
IIC_DIRECTCNTL1
,
0xC
);
out
_
8
(
IIC_DIRECTCNTL1
,
0xC
);
udelay
(
1000
);
/* 1ms */
udelay
(
1000
);
/* 1ms */
/* Unreset controller */
/* Unreset controller */
out8
(
IIC_XTCNTLSS1
,
(
status
&
~
IIC_XTCNTLSS_SRST
));
out
_
8
(
IIC_XTCNTLSS1
,
(
status
&
~
IIC_XTCNTLSS_SRST
));
udelay
(
1000
);
/* 1ms */
udelay
(
1000
);
/* 1ms */
}
}
...
@@ -117,16 +120,16 @@ void i2c1_init (int speed, int slaveadd)
...
@@ -117,16 +120,16 @@ void i2c1_init (int speed, int slaveadd)
_i2c_bus1_reset
();
_i2c_bus1_reset
();
/* clear lo master address */
/* clear lo master address */
out8
(
IIC_LMADR1
,
0
);
out
_
8
(
IIC_LMADR1
,
0
);
/* clear hi master address */
/* clear hi master address */
out8
(
IIC_HMADR1
,
0
);
out
_
8
(
IIC_HMADR1
,
0
);
/* clear lo slave address */
/* clear lo slave address */
out8
(
IIC_LSADR1
,
0
);
out
_
8
(
IIC_LSADR1
,
0
);
/* clear hi slave address */
/* clear hi slave address */
out8
(
IIC_HSADR1
,
0
);
out
_
8
(
IIC_HSADR1
,
0
);
/* Clock divide Register */
/* Clock divide Register */
/* get OPB frequency */
/* get OPB frequency */
...
@@ -136,25 +139,25 @@ void i2c1_init (int speed, int slaveadd)
...
@@ -136,25 +139,25 @@ void i2c1_init (int speed, int slaveadd)
divisor
=
(
freqOPB
-
1
)
/
10000000
;
divisor
=
(
freqOPB
-
1
)
/
10000000
;
if
(
divisor
==
0
)
if
(
divisor
==
0
)
divisor
=
1
;
divisor
=
1
;
out8
(
IIC_CLKDIV1
,
divisor
);
out
_
8
(
IIC_CLKDIV1
,
divisor
);
/* no interrupts */
/* no interrupts */
out8
(
IIC_INTRMSK1
,
0
);
out
_
8
(
IIC_INTRMSK1
,
0
);
/* clear transfer count */
/* clear transfer count */
out8
(
IIC_XFRCNT1
,
0
);
out
_
8
(
IIC_XFRCNT1
,
0
);
/* clear extended control & stat */
/* clear extended control & stat */
/* write 1 in SRC SRS SWC SWS to clear these fields */
/* write 1 in SRC SRS SWC SWS to clear these fields */
out8
(
IIC_XTCNTLSS1
,
0xF0
);
out
_
8
(
IIC_XTCNTLSS1
,
0xF0
);
/* Mode Control Register
/* Mode Control Register
Flush Slave/Master data buffer */
Flush Slave/Master data buffer */
out8
(
IIC_MDCNTL1
,
IIC_MDCNTL_FSDB
|
IIC_MDCNTL_FMDB
);
out
_
8
(
IIC_MDCNTL1
,
IIC_MDCNTL_FSDB
|
IIC_MDCNTL_FMDB
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
val
=
in8
(
IIC_MDCNTL1
);
val
=
in
_
8
(
IIC_MDCNTL1
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
/* Ignore General Call, slave transfers are ignored,
/* Ignore General Call, slave transfers are ignored,
...
@@ -167,10 +170,10 @@ void i2c1_init (int speed, int slaveadd)
...
@@ -167,10 +170,10 @@ void i2c1_init (int speed, int slaveadd)
if
(
speed
>=
400000
){
if
(
speed
>=
400000
){
val
|=
IIC_MDCNTL_FSM
;
val
|=
IIC_MDCNTL_FSM
;
}
}
out8
(
IIC_MDCNTL1
,
val
);
out
_
8
(
IIC_MDCNTL1
,
val
);
/* clear control reg */
/* clear control reg */
out8
(
IIC_CNTL1
,
0x00
);
out
_
8
(
IIC_CNTL1
,
0x00
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
}
}
...
@@ -178,7 +181,7 @@ void i2c1_init (int speed, int slaveadd)
...
@@ -178,7 +181,7 @@ void i2c1_init (int speed, int slaveadd)
/*
/*
This code tries to use the features of the 405GP i2c
This code tries to use the features of the 405GP i2c
controller. It will transfer up to 4 bytes in one pass
controller. It will transfer up to 4 bytes in one pass
on the loop. It only does out8(lbz) to the buffer when it
on the loop. It only does out
_
8(lbz) to the buffer when it
is possible to do out16(lhz) transfers.
is possible to do out16(lhz) transfers.
cmd_type is 0 for write 1 for read.
cmd_type is 0 for write 1 for read.
...
@@ -232,12 +235,12 @@ int i2c_transfer1(unsigned char cmd_type,
...
@@ -232,12 +235,12 @@ int i2c_transfer1(unsigned char cmd_type,
}
}
/*Clear Stop Complete Bit*/
/*Clear Stop Complete Bit*/
out8
(
IIC_STS1
,
IIC_STS_SCMP
);
out
_
8
(
IIC_STS1
,
IIC_STS_SCMP
);
/* Check init */
/* Check init */
i
=
10
;
i
=
10
;
do
{
do
{
/* Get status */
/* Get status */
status
=
in8
(
IIC_STS1
);
status
=
in
_
8
(
IIC_STS1
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
i
--
;
i
--
;
}
while
((
status
&
IIC_STS_PT
)
&&
(
i
>
0
));
}
while
((
status
&
IIC_STS_PT
)
&&
(
i
>
0
));
...
@@ -247,12 +250,12 @@ int i2c_transfer1(unsigned char cmd_type,
...
@@ -247,12 +250,12 @@ int i2c_transfer1(unsigned char cmd_type,
return
(
result
);
return
(
result
);
}
}
/*flush the Master/Slave Databuffers*/
/*flush the Master/Slave Databuffers*/
out
8
(
IIC_MDCNTL1
,
((
in
8
(
IIC_MDCNTL1
))
|
IIC_MDCNTL_FMDB
|
IIC_MDCNTL_FSDB
));
out
_8
(
IIC_MDCNTL1
,
((
in_
8
(
IIC_MDCNTL1
))
|
IIC_MDCNTL_FMDB
|
IIC_MDCNTL_FSDB
));
/*need to wait 4 OPB clocks? code below should take that long*/
/*need to wait 4 OPB clocks? code below should take that long*/
/* 7-bit adressing */
/* 7-bit adressing */
out8
(
IIC_HMADR1
,
0
);
out
_
8
(
IIC_HMADR1
,
0
);
out8
(
IIC_LMADR1
,
chip
);
out
_
8
(
IIC_LMADR1
,
chip
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
tran
=
0
;
tran
=
0
;
...
@@ -280,11 +283,11 @@ int i2c_transfer1(unsigned char cmd_type,
...
@@ -280,11 +283,11 @@ int i2c_transfer1(unsigned char cmd_type,
else
{
else
{
for
(
j
=
0
;
j
<
bc
;
j
++
)
{
for
(
j
=
0
;
j
<
bc
;
j
++
)
{
/* Set buffer */
/* Set buffer */
out8
(
IIC_MDBUF1
,
ptr
[
tran
+
j
]);
out
_
8
(
IIC_MDBUF1
,
ptr
[
tran
+
j
]);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
}
}
}
}
out8
(
IIC_CNTL1
,
creg
);
out
_
8
(
IIC_CNTL1
,
creg
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
/* Transfer is in progress
/* Transfer is in progress
...
@@ -297,7 +300,7 @@ int i2c_transfer1(unsigned char cmd_type,
...
@@ -297,7 +300,7 @@ int i2c_transfer1(unsigned char cmd_type,
i
=
2
*
5
*
8
;
i
=
2
*
5
*
8
;
do
{
do
{
/* Get status */
/* Get status */
status
=
in8
(
IIC_STS1
);
status
=
in
_
8
(
IIC_STS1
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
udelay
(
10
);
udelay
(
10
);
i
--
;
i
--
;
...
@@ -306,7 +309,7 @@ int i2c_transfer1(unsigned char cmd_type,
...
@@ -306,7 +309,7 @@ int i2c_transfer1(unsigned char cmd_type,
if
(
status
&
IIC_STS_ERR
)
{
if
(
status
&
IIC_STS_ERR
)
{
result
=
IIC_NOK
;
result
=
IIC_NOK
;
status
=
in8
(
IIC_EXTSTS1
);
status
=
in
_
8
(
IIC_EXTSTS1
);
/* Lost arbitration? */
/* Lost arbitration? */
if
(
status
&
IIC_EXTSTS_LA
)
if
(
status
&
IIC_EXTSTS_LA
)
result
=
IIC_NOK_LA
;
result
=
IIC_NOK_LA
;
...
@@ -331,7 +334,7 @@ int i2c_transfer1(unsigned char cmd_type,
...
@@ -331,7 +334,7 @@ int i2c_transfer1(unsigned char cmd_type,
*/
*/
udelay
(
1
);
udelay
(
1
);
for
(
j
=
0
;
j
<
bc
;
j
++
)
{
for
(
j
=
0
;
j
<
bc
;
j
++
)
{
ptr
[
tran
+
j
]
=
in8
(
IIC_MDBUF1
);
ptr
[
tran
+
j
]
=
in
_
8
(
IIC_MDBUF1
);
__asm__
volatile
(
"eieio"
);
__asm__
volatile
(
"eieio"
);
}
}
}
else
}
else
...
...
board/sandburst/common/ppc440gx_i2c.h
浏览文件 @
6ca9da4d
...
@@ -34,21 +34,21 @@
...
@@ -34,21 +34,21 @@
#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
#define IIC_MDBUF1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDBUF
)
#define IIC_MDBUF1 (
&i2c->mdbuf
)
#define IIC_SDBUF1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICSDBUF
)
#define IIC_SDBUF1 (
&i2c->sdbuf
)
#define IIC_LMADR1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICLMADR
)
#define IIC_LMADR1 (
&i2c->lmadr
)
#define IIC_HMADR1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICHMADR
)
#define IIC_HMADR1 (
&i2c->hmadr
)
#define IIC_CNTL1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICCNTL
)
#define IIC_CNTL1 (
&i2c->cntl
)
#define IIC_MDCNTL1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDCNTL
)
#define IIC_MDCNTL1 (
&i2c->mdcntl
)
#define IIC_STS1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICSTS
)
#define IIC_STS1 (
&i2c->sts
)
#define IIC_EXTSTS1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICEXTSTS
)
#define IIC_EXTSTS1 (
&i2c->extsts
)
#define IIC_LSADR1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICLSADR
)
#define IIC_LSADR1 (
&i2c->lsadr
)
#define IIC_HSADR1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICHSADR
)
#define IIC_HSADR1 (
&i2c->hsadr
)
#define IIC_CLKDIV1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IIC0_CLKDIV
)
#define IIC_CLKDIV1 (
&i2c->clkdiv
)
#define IIC_INTRMSK1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICINTRMSK
)
#define IIC_INTRMSK1 (
&i2c->intrmsk
)
#define IIC_XFRCNT1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICXFRCNT
)
#define IIC_XFRCNT1 (
&i2c->xfrcnt
)
#define IIC_XTCNTLSS1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICXTCNTLSS
)
#define IIC_XTCNTLSS1 (
&i2c->xtcntlss
)
#define IIC_DIRECTCNTL1 (
I2C_REGISTERS_BUS1_BASE_ADDRESS+IICDIRECTCNTL
)
#define IIC_DIRECTCNTL1 (
&i2c->directcntl
)
void
i2c1_init
(
int
speed
,
int
slaveadd
);
void
i2c1_init
(
int
speed
,
int
slaveadd
);
int
i2c_probe1
(
uchar
chip
);
int
i2c_probe1
(
uchar
chip
);
...
...
include/configs/alpr.h
浏览文件 @
6ca9da4d
...
@@ -232,7 +232,6 @@
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@@ -232,7 +232,6 @@
#include <config_cmd_default.h>
#include <config_cmd_default.h>
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_FPGA
#define CONFIG_CMD_FPGA
#define CONFIG_CMD_I2C
#define CONFIG_CMD_I2C
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@@ -240,7 +239,6 @@
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@@ -240,7 +239,6 @@
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NET
#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_NFS
#undef CONFIG_WATCHDOG
/* watchdog disabled */
#undef CONFIG_WATCHDOG
/* watchdog disabled */
...
...
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