提交 6a48f95c 编写于 作者: L Ley Foon Tan

arm: socfpga: mailbox: Update mailbox response codes

Sync latest mailbox response codes from SDM firmware.
Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: NChee Hong Ang <chee.hong.ang@intel.com>
上级 f6dcf407
......@@ -67,8 +67,42 @@ enum ALT_SDM_MBOX_RESP_CODE {
MBOX_RESP_UNKNOWN_BR = 2,
/* CMD code not recognized by firmware */
MBOX_RESP_UNKNOWN = 3,
/* Indicates that the device is not configured */
MBOX_RESP_NOT_CONFIGURED = 256,
/* Length setting is not a valid length for this CMD type */
MBOX_RESP_INVALID_LEN = 4,
/* Indirect setting is not valid for this CMD type */
MBOX_RESP_INVALID_INDIRECT_SETTING = 5,
/* HW source which is not allowed to send CMD type */
MBOX_RESP_CMD_INVALID_ON_SRC = 6,
/* Client with ID not associated with any running PR CMD tries to run
* RECONFIG_DATA RECONFIG_STATUS and accessing QSPI / SDMMC using ID
* without exclusive access
*/
MBOX_RESP_CLIENT_ID_NO_MATCH = 8,
/* Address provided to the system is invalid (alignment, range
* permission)
*/
MBOX_RESP_INVALID_ADDR = 0x9,
/* Signature authentication failed */
MBOX_RESP_AUTH_FAIL = 0xA,
/* CMD timed out */
MBOX_RESP_TIMEOUT = 0xB,
/* HW (i.e. QSPI) is not ready (initialized or configured) */
MBOX_RESP_HW_NOT_RDY = 0xC,
/* Invalid license for IID registration */
MBOX_RESP_PUF_ACCCES_FAILED = 0x80,
MBOX_PUF_ENROLL_DISABLE = 0x81,
MBOX_RESP_PUF_ENROLL_FAIL = 0x82,
MBOX_RESP_PUF_RAM_TEST_FAIL = 0x83,
MBOX_RESP_ATTEST_CERT_GEN_FAIL = 0x84,
/* Operation not allowed under current security settings */
MBOX_RESP_NOT_ALLOWED_UNDER_SECURITY_SETTINGS = 0x85,
MBOX_RESP_PUF_TRNG_FAIL = 0x86,
MBOX_RESP_FUSE_ALREADY_BLOWN = 0x87,
MBOX_RESP_INVALID_SIGNATURE = 0x88,
MBOX_RESP_INVALID_HASH = 0x8b,
MBOX_RESP_INVALID_CERTIFICATE = 0x91,
/* Indicates that the device (FPGA or HPS) is not configured */
MBOX_RESP_NOT_CONFIGURED = 0x100,
/* Indicates that the device is busy */
MBOX_RESP_DEVICE_BUSY = 0x1FF,
/* Indicates that there is no valid response available */
......
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