Merge branch 'master' of git://git.denx.de/u-boot-at91

MAKEALL

@@ -571,6 +571,7 @@ LIST_at91="		\
 	afeb9260	\
 	at91cap9adk	\
 	at91rm9200dk	\
+	at91rm9200ek	\
 	at91sam9260ek	\
 	at91sam9261ek	\
 	at91sam9263ek	\

Makefile

@@ -265,6 +265,7 @@ LIBS += drivers/serial/libserial.a
 LIBS += drivers/twserial/libtws.a
 LIBS += drivers/usb/libusb.a
 LIBS += drivers/video/libvideo.a
+LIBS += drivers/watchdog/libwatchdog.a
 LIBS += common/libcommon.a
 LIBS += libfdt/libfdt.a
 LIBS += api/libapi.a
@@ -2629,6 +2630,9 @@ shannon_config	:	unconfig
 at91rm9200dk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
 
+at91rm9200ek_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200ek atmel at91rm9200
+
 cmc_pu2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
 

board/atmel/at91rm9200dk/Makefile

@@ -25,10 +25,16 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= at91rm9200dk.o flash.o led.o mux.o partition.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
+COBJS-y += $(BOARD).o
+COBJS-y += flash.o
+COBJS-y += led.o
+ifdef CONFIG_HAS_DATAFLASH
+COBJS-$(CONFIG_DATAFLASH_MMC_SELECT) += mux.o
+COBJS-y += partition.o
+endif
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)

board/atmel/at91rm9200dk/at91rm9200dk.c

@@ -54,6 +54,16 @@ int board_init (void)
 	return 0;
 }
 
+void board_reset (void)
+{
+	AT91PS_PIO pio = AT91C_BASE_PIOA;
+
+	/* Clear PA19 to trigger the hard reset */
+	writel(0x00080000, pio->PIO_CODR);
+	writel(0x00080000, pio->PIO_OER);
+	writel(0x00080000, pio->PIO_PER);
+}
+
 int dram_init (void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;

board/atmel/at91rm9200dk/mux.c

@@ -4,34 +4,26 @@
 #include <dataflash.h>
 
 int AT91F_GetMuxStatus(void) {
-#ifdef	DATAFLASH_MMC_SELECT
-	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
-	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+	AT91C_BASE_PIOB->PIO_PER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Set in PIO mode */
+	AT91C_BASE_PIOB->PIO_OER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Configure in output */
 
 
-	if(AT91C_BASE_PIOB->PIO_ODSR & DATAFLASH_MMC_SELECT) {
+	if(AT91C_BASE_PIOB->PIO_ODSR & CONFIG_SYS_DATAFLASH_MMC_PIO)
 		return 1;
-	} else {
-		return 0;
-	}
-#endif
+
 	return 0;
 }
 
 void AT91F_SelectMMC(void) {
-#ifdef	DATAFLASH_MMC_SELECT
-	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT;	/* Set in PIO mode */
-	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT;	/* Configure in output */
+	AT91C_BASE_PIOB->PIO_PER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Set in PIO mode */
+	AT91C_BASE_PIOB->PIO_OER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Configure in output */
 	/* Set Output */
-	AT91C_BASE_PIOB->PIO_SODR = DATAFLASH_MMC_SELECT;
-#endif
+	AT91C_BASE_PIOB->PIO_SODR = CONFIG_SYS_DATAFLASH_MMC_PIO;
 }
 
 void AT91F_SelectSPI(void) {
-#ifdef	DATAFLASH_MMC_SELECT
-	AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT;	/* Set in PIO mode */
-	AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT;	/* Configure in output */
+	AT91C_BASE_PIOB->PIO_PER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Set in PIO mode */
+	AT91C_BASE_PIOB->PIO_OER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Configure in output */
 	/* Clear Output */
-	AT91C_BASE_PIOB->PIO_CODR = DATAFLASH_MMC_SELECT;
-#endif
+	AT91C_BASE_PIOB->PIO_CODR = CONFIG_SYS_DATAFLASH_MMC_PIO;
 }

board/atmel/at91rm9200ek/Makefile

+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y += $(BOARD).o
+COBJS-y += led.o
+COBJS-y += misc.o
+ifdef CONFIG_HAS_DATAFLASH
+COBJS-$(CONFIG_DATAFLASH_MMC_SELECT) += mux.o
+COBJS-y += partition.o
+endif
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/atmel/at91rm9200ek/at91rm9200ek.c

+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+#include <at91rm9200_net.h>
+#include <dm9161.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+	/* Enable Ctrlc */
+	console_init_f ();
+
+	/*
+	 * Correct IRDA resistor problem
+	 * Set PA23_TXD in Output
+	 */
+	writel(AT91C_PA23_TXD2, ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER);
+
+	/*
+	 * memory and cpu-speed are setup before relocation
+	 * so we do _nothing_ here
+	 */
+
+	/* arch number of AT91RM9200EK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200EK;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	return 0;
+}
+
+int dram_init (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
+}
+
+#if defined(CONFIG_DRIVER_ETHER) && defined(CONFIG_CMD_NET)
+/*
+ * Name:
+ *	at91rm9200_GetPhyInterface
+ * Description:
+ *	Initialise the interface functions to the PHY
+ * Arguments:
+ *	None
+ * Return value:
+ *	None
+ */
+void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
+{
+	p_phyops->Init = dm9161_InitPhy;
+	p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
+	p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
+	p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
+}
+#endif

board/atmel/at91rm9200ek/config.mk

+TEXT_BASE = 0x21f00000

board/atmel/at91rm9200ek/led.c

+/*
+ * (C) Copyright 2006
+ * Atmel Nordic AB <www.atmel.com>
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+#include <asm/io.h>
+
+#define	GREEN_LED	AT91C_PIO_PB0
+#define	YELLOW_LED	AT91C_PIO_PB1
+#define	RED_LED		AT91C_PIO_PB2
+
+void	green_LED_on(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+
+	writel(GREEN_LED, PIOB->PIO_CODR);
+}
+
+void	 yellow_LED_on(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+
+	writel(YELLOW_LED, PIOB->PIO_CODR);
+}
+
+void	 red_LED_on(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+
+	writel(RED_LED, PIOB->PIO_CODR);
+}
+
+void	green_LED_off(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+
+	writel(GREEN_LED, PIOB->PIO_SODR);
+}
+
+void	yellow_LED_off(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+
+	writel(YELLOW_LED, PIOB->PIO_SODR);
+}
+
+void	red_LED_off(void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+
+	writel(RED_LED, PIOB->PIO_SODR);
+}
+
+
+void coloured_LED_init (void)
+{
+	AT91PS_PIO	PIOB	= AT91C_BASE_PIOB;
+	AT91PS_PMC	PMC	= AT91C_BASE_PMC;
+
+	/* Enable PIOB clock */
+	writel((1 << AT91C_ID_PIOB), PMC->PMC_PCER);
+	/* Disable peripherals on LEDs */
+	writel(AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0, PIOB->PIO_PER);
+	/* Enable pins as outputs */
+	writel(AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0, PIOB->PIO_OER);
+	/* Turn all LEDs OFF */
+	writel(AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0, PIOB->PIO_SODR);
+}

board/atmel/at91rm9200ek/misc.c

+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+#include <at91rm9200_net.h>
+#include <dm9161.h>
+#include <net.h>
+
+int board_late_init(void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	/* Fix Ethernet Initialization Bug when starting Linux from U-Boot */
+	eth_init(gd->bd);
+	return 0;
+}
+
+
+/* checks if addr is in RAM */
+int addr2ram(ulong addr)
+{
+	int result = 0;
+
+	if((addr >= PHYS_SDRAM) && (addr < (PHYS_SDRAM + PHYS_SDRAM_SIZE)))
+		result = 1;
+
+	return result;
+}
+

board/atmel/at91rm9200ek/mux.c

+#include <config.h>
+#include <common.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <dataflash.h>
+
+int AT91F_GetMuxStatus(void)
+{
+	/* Set in PIO mode */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_PER);
+	/* Configure in output */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_OER);
+
+	if(readl(AT91C_BASE_PIOB->PIO_ODSR) & CONFIG_SYS_DATAFLASH_MMC_PIO)
+		return 1;
+
+	return 0;
+}
+
+void AT91F_SelectMMC(void)
+{
+	/* Set in PIO mode */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_PER);
+	/* Configure in output */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_OER);
+	/* Set Output */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_SODR);
+}
+
+void AT91F_SelectSPI(void)
+{
+	/* Set in PIO mode */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_PER);
+	/* Configure in output */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_OER);
+	/* Clear Output */
+	writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_CODR);
+}

board/atmel/at91rm9200ek/partition.c

+/*
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <config.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
+
+struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
+	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
+	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3}
+};
+
+/*define the area offsets*/
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,	0, "Bootstrap"},
+	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR,	0, "Environment"},
+	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,	0, "U-Boot"},
+	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR,	0, "Kernel"},
+	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR,	0, "FS"},
+};

board/atmel/at91rm9200ek/u-boot.lds

+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text :
+	{
+		cpu/arm920t/start.o	(.text)
+		*(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}

common/Makefile

@@ -72,6 +72,7 @@ COBJS-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o
 COBJS-$(CONFIG_CMD_CACHE) += cmd_cache.o
 COBJS-$(CONFIG_CMD_CONSOLE) += cmd_console.o
 COBJS-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o
+COBJS-$(CONFIG_DATAFLASH_MMC_SELECT) += cmd_dataflash_mmc_mux.o
 COBJS-$(CONFIG_CMD_DATE) += cmd_date.o
 ifdef CONFIG_4xx
 COBJS-$(CONFIG_CMD_SETGETDCR) += cmd_dcr.o

common/cmd_dataflash_mmc_mux.c

+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+static int mmc_nspi (const char *);
+
+int do_dataflash_mmc_mux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	switch (argc) {
+	case 2:			/* on / off	*/
+		switch (mmc_nspi (argv[1])) {
+		case 0:	AT91F_SelectSPI ();
+			break;
+		case 1:	AT91F_SelectMMC ();
+			break;
+		}
+	case 1:			/* get status */
+		printf ("Mux is configured to be %s\n",
+			AT91F_GetMuxStatus () ? "MMC" : "SPI");
+		return 0;
+	default:
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+	return 0;
+}
+
+static int mmc_nspi (const char *s)
+{
+	if (strcmp (s, "mmc") == 0) {
+		return 1;
+	} else if (strcmp (s, "spi") == 0) {
+		return 0;
+	}
+	return -1;
+}
+
+U_BOOT_CMD(
+	dataflash_mmc_mux, 2, 1, do_dataflash_mmc_mux,
+	"dataflash_mmc_mux\t- enable or disable MMC or SPI\n",
+	"[mmc, spi]\n"
+	"    - enable or disable MMC or SPI\n"
+);

cpu/arm920t/at91rm9200/Makefile

@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(SOC).a
 
 COBJS	= bcm5221.o dm9161.o ether.o i2c.o interrupts.o \
-	  lxt972.o serial.o usb.o spi.o
+	  lxt972.o usb.o spi.o
 SOBJS	= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)

cpu/arm920t/at91rm9200/interrupts.c

@@ -45,6 +45,8 @@ AT91PS_TC tmr;
 static ulong timestamp;
 static ulong lastinc;
 
+void board_reset(void) __attribute__((__weak__));
+
 int interrupt_init (void)
 {
 	tmr = AT91C_BASE_TC0;
@@ -166,29 +168,14 @@ ulong get_tbclk (void)
 void reset_cpu (ulong ignored)
 {
 
-#ifdef CONFIG_DBGU
-	AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
-#endif
-#ifdef CONFIG_USART0
-	AT91PS_USART us = AT91C_BASE_US0;
-#endif
-#ifdef CONFIG_USART1
-	AT91PS_USART us = AT91C_BASE_US1;
-#endif
-#ifdef CONFIG_AT91RM9200DK
-	AT91PS_PIO pio = AT91C_BASE_PIOA;
-#endif
-
+#if defined(CONFIG_AT91RM9200_USART)
 	/*shutdown the console to avoid strange chars during reset */
-	us->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX);
-
-#ifdef CONFIG_AT91RM9200DK
-	/* Clear PA19 to trigger the hard reset */
-	pio->PIO_CODR = 0x00080000;
-	pio->PIO_OER  = 0x00080000;
-	pio->PIO_PER  = 0x00080000;
+	serial_exit();
 #endif
 
+	if (board_reset)
+		board_reset();
+
 	/* this is the way Linux does it */
 
 	/* FIXME:

cpu/arm920t/start.S

@@ -258,11 +258,9 @@ cpu_init_crit:
 	 * find a lowlevel_init.S in your board directory.
 	 */
 	mov	ip, lr
-#if	defined(CONFIG_AT91RM9200EK)
 
-#else
 	bl	lowlevel_init
-#endif
+
 	mov	lr, ip
 	mov	pc, lr
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */

cpu/arm926ejs/at91/.gitignore

+#
+# Generated files
+#
+
+/u-boot.lds

cpu/arm926ejs/at91/Makefile

@@ -55,9 +55,7 @@ COBJS-y				+= at91sam9rl_serial.o
 COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91sam9rl_spi.o
 endif
 COBJS-$(CONFIG_AT91_LED)	+= led.o
-COBJS-$(CONFIG_HAS_DATAFLASH)	+= spi.o
 COBJS-y	+= timer.o
-COBJS-y	+= usb.o
 SOBJS	= lowlevel_init.o
 
 SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)

cpu/arm926ejs/at91/at91cap9_spi.c

@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PA5, 1);
+		at91_set_B_periph(AT91_PIN_PA5, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PA3, 1);
+		at91_set_B_periph(AT91_PIN_PA3, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PD0, 1);
+		at91_set_B_periph(AT91_PIN_PD0, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_B_periph(AT91_PIN_PD1, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PA5, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PD0, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PD1, 1);
 	}
 }
@@ -61,15 +73,28 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PB15, 1);
+		at91_set_A_periph(AT91_PIN_PB15, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PB16, 1);
+		at91_set_A_periph(AT91_PIN_PB16, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PB17, 1);
+		at91_set_A_periph(AT91_PIN_PB17, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_A_periph(AT91_PIN_PB18, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PB15, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PB16, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PB17, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PB18, 1);
 	}
+
 }

cpu/arm926ejs/at91/at91sam9260_spi.c

@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PA3, 1);
+		at91_set_A_periph(AT91_PIN_PA3, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PC11, 1);
+		at91_set_B_periph(AT91_PIN_PC11, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PC16, 1);
+		at91_set_B_periph(AT91_PIN_PC16, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_B_periph(AT91_PIN_PC17, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PC11, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PC16, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PC17, 1);
 	}
 }
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PB3, 1);
+		at91_set_A_periph(AT91_PIN_PB3, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PC5, 1);
+		at91_set_B_periph(AT91_PIN_PC5, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PC4, 1);
+		at91_set_B_periph(AT91_PIN_PC4, 1);
 	}
 	if (cs_mask & (1 << 3)) {
 		at91_set_gpio_output(AT91_PIN_PC3, 1);
 	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PB3, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PC5, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PC4, 1);
+	}
+	if (cs_mask & (1 << 7)) {
+		at91_set_gpio_output(AT91_PIN_PC3, 1);
+	}
 }

cpu/arm926ejs/at91/at91sam9261_spi.c

@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PA3, 1);
+		at91_set_A_periph(AT91_PIN_PA3, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PA4, 1);
+		at91_set_A_periph(AT91_PIN_PA4, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PA5, 1);
+		at91_set_A_periph(AT91_PIN_PA5, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_A_periph(AT91_PIN_PA6, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PA4, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PA5, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PA6, 1);
 	}
 }
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PB28, 1);
+		at91_set_A_periph(AT91_PIN_PB28, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PA24, 1);
+		at91_set_B_periph(AT91_PIN_PA24, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PA25, 1);
+		at91_set_B_periph(AT91_PIN_PA25, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_A_periph(AT91_PIN_PA26, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PB28, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PA24, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PA25, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PA26, 1);
 	}
 }

cpu/arm926ejs/at91/at91sam9263_spi.c

@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PA5, 1);
+		at91_set_B_periph(AT91_PIN_PA5, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PA3, 1);
+		at91_set_B_periph(AT91_PIN_PA3, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PA4, 1);
+		at91_set_B_periph(AT91_PIN_PA4, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_B_periph(AT91_PIN_PB11, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PA5, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PA4, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PB11, 1);
 	}
 }
@@ -61,15 +73,27 @@ void at91_spi1_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PB15, 1);
+		at91_set_A_periph(AT91_PIN_PB15, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PB16, 1);
+		at91_set_A_periph(AT91_PIN_PB16, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PB17, 1);
+		at91_set_A_periph(AT91_PIN_PB17, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_A_periph(AT91_PIN_PB18, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PB15, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PB16, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PB17, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PB18, 1);
 	}
 }

cpu/arm926ejs/at91/at91sam9rl_spi.c

@@ -38,15 +38,27 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
 
 	if (cs_mask & (1 << 0)) {
-		at91_set_gpio_output(AT91_PIN_PA28, 1);
+		at91_set_A_periph(AT91_PIN_PA28, 1);
 	}
 	if (cs_mask & (1 << 1)) {
-		at91_set_gpio_output(AT91_PIN_PB7, 1);
+		at91_set_B_periph(AT91_PIN_PB7, 1);
 	}
 	if (cs_mask & (1 << 2)) {
-		at91_set_gpio_output(AT91_PIN_PD8, 1);
+		at91_set_A_periph(AT91_PIN_PD8, 1);
 	}
 	if (cs_mask & (1 << 3)) {
+		at91_set_B_periph(AT91_PIN_PD9, 1);
+	}
+	if (cs_mask & (1 << 4)) {
+		at91_set_gpio_output(AT91_PIN_PA28, 1);
+	}
+	if (cs_mask & (1 << 5)) {
+		at91_set_gpio_output(AT91_PIN_PB7, 1);
+	}
+	if (cs_mask & (1 << 6)) {
+		at91_set_gpio_output(AT91_PIN_PD8, 1);
+	}
+	if (cs_mask & (1 << 7)) {
 		at91_set_gpio_output(AT91_PIN_PD9, 1);
 	}
 }

doc/README.at91

@@ -2,6 +2,7 @@ Atmel AT91 Evaluation kits
 
 http://atmel.com/dyn/products/tools.asp?family_id=605#1443
 
+I. Board mapping & boot media
 ------------------------------------------------------------------------------
 AT91SAM9260EK, AT91SAM9G20EK & AT91SAM9XEEK
 ------------------------------------------------------------------------------
@@ -86,3 +87,13 @@ Environment variables
 		make at91sam9263ek_config		- use data flash (spi cs0) (default)
 		make at91sam9263ek_nandflash_config	- use nand flash
 		make at91sam9263ek_dataflash_cs0_config	- use data flash (spi cs0)
+
+II. Watchdog support
+
+	For security reasons, the at91 watchdog is running at boot time and,
+	if deactivated, cannot be used anymore.
+	If you want to use the watchdog, you will need to keep it running in
+	your code (make sure not to disable it in AT91Bootstrap for instance).
+
+	In the U-Boot configuration, the AT91 watchdog support is enabled using
+	the CONFIG_AT91SAM9_WATCHDOG and CONFIG_HW_WATCHDOG options.

drivers/mtd/cfi_flash.c

@@ -1788,13 +1788,10 @@ static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
 
 	/* AT49BV6416(T) list the erase regions in the wrong order.
 	 * However, the device ID is identical with the non-broken
-	 * AT49BV642D since u-boot only reads the low byte (they
-	 * differ in the high byte.) So leave out this fixup for now.
+	 * AT49BV642D they differ in the high byte.
 	 */
-#if 0
 	if (info->device_id == 0xd6 || info->device_id == 0xd2)
 		reverse_geometry = !reverse_geometry;
-#endif
 
 	if (reverse_geometry)
 		cfi_reverse_geometry(qry);

drivers/serial/Makefile

@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	:= $(obj)libserial.a
 
 COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
+COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o
 COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
 COBJS-$(CONFIG_MCFUART) += mcfuart.o
 COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o

cpu/arm920t/at91rm9200/serial.c → drivers/serial/at91rm9200_usart.c

@@ -86,6 +86,11 @@ int serial_init (void)
 	return (0);
 }
 
+void serial_exit (void)
+{
+	us->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX);
+}
+
 void serial_putc (const char c)
 {
 	if (c == '\n')

drivers/serial/atmel_usart.c

@@ -16,6 +16,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #include <common.h>
+#include <watchdog.h>
 
 #include <asm/io.h>
 #include <asm/arch/clk.h>
@@ -87,7 +88,8 @@ void serial_puts(const char *s)
 
 int serial_getc(void)
 {
-	while (!(usart3_readl(CSR) & USART3_BIT(RXRDY))) ;
+	while (!(usart3_readl(CSR) & USART3_BIT(RXRDY)))
+		 WATCHDOG_RESET();
 	return usart3_readl(RHR);
 }
 

drivers/spi/Makefile

@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)libspi.a
 
+COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
 COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o

drivers/usb/Makefile

@@ -31,6 +31,7 @@ COBJS-$(CONFIG_USB_OHCI_NEW) += usb_ohci.o
 COBJS-$(CONFIG_USB_EHCI) += usb_ehci_core.o
 
 # host
+COBJS-$(CONFIG_USB_ATMEL) += atmel_usb.o
 COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
 COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
 COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx_usb.o

drivers/watchdog/Makefile

+#
+# (C) Copyright 2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	:= $(obj)libwatchdog.a
+
+COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
+
+COBJS	:= $(COBJS-y)
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+all:	$(LIB)
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

drivers/watchdog/at91sam9_wdt.c

+/*
+ * [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c]
+ *
+ * Watchdog driver for Atmel AT91SAM9x processors.
+ *
+ * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+/*
+ * The Watchdog Timer Mode Register can be only written to once. If the
+ * timeout need to be set from U-Boot, be sure that the bootstrap doesn't
+ * write to this register. Inform Linux to it too
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/io.h>
+#include <asm/arch/at91_wdt.h>
+
+/*
+ * AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
+ * use this to convert a watchdog
+ * value from/to milliseconds.
+ */
+#define ms_to_ticks(t)	(((t << 8) / 1000) - 1)
+#define ticks_to_ms(t)	(((t + 1) * 1000) >> 8)
+
+/* Hardware timeout in seconds */
+#define WDT_HW_TIMEOUT 2
+
+/*
+ * Set the watchdog time interval in 1/256Hz (write-once)
+ * Counter is 12 bit.
+ */
+static int at91_wdt_settimeout(unsigned int timeout)
+{
+	unsigned int reg;
+	unsigned int mr;
+
+	/* Check if disabled */
+	mr = at91_sys_read(AT91_WDT_MR);
+	if (mr & AT91_WDT_WDDIS) {
+		printf("sorry, watchdog is disabled\n");
+		return -1;
+	}
+
+	/*
+	 * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
+	 *
+	 * Since WDV is a 12-bit counter, the maximum period is
+	 * 4096 / 256 = 16 seconds.
+	 */
+	reg = AT91_WDT_WDRSTEN	/* causes watchdog reset */
+		/* | AT91_WDT_WDRPROC	causes processor reset only */
+		| AT91_WDT_WDDBGHLT		/* disabled in debug mode */
+		| AT91_WDT_WDD			/* restart at any time */
+		| (timeout & AT91_WDT_WDV);	/* timer value */
+	at91_sys_write(AT91_WDT_MR, reg);
+
+	return 0;
+}
+
+void hw_watchdog_reset(void)
+{
+	at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+}
+
+void hw_watchdog_init(void)
+{
+	/* 16 seconds timer, resets enabled */
+	at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
+}

include/asm-arm/arch-at91/at91_wdt.h

+/*
+ * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_wdt.h]
+ *
+ * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
+ * Watchdog Timer (WDT) - System peripherals regsters.
+ * Based on AT91SAM9261 datasheet revision D.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_WDT_H
+#define AT91_WDT_H
+
+#define AT91_WDT_CR		(AT91_WDT + 0x00)	/* Watchdog Control Register */
+#define		AT91_WDT_WDRSTT		(1    << 0)		/* Restart */
+#define		AT91_WDT_KEY		(0xa5 << 24)		/* KEY Password */
+
+#define AT91_WDT_MR		(AT91_WDT + 0x04)	/* Watchdog Mode Register */
+#define		AT91_WDT_WDV		(0xfff << 0)		/* Counter Value */
+#define		AT91_WDT_WDFIEN		(1     << 12)		/* Fault Interrupt Enable */
+#define		AT91_WDT_WDRSTEN	(1     << 13)		/* Reset Processor */
+#define		AT91_WDT_WDRPROC	(1     << 14)		/* Timer Restart */
+#define		AT91_WDT_WDDIS		(1     << 15)		/* Watchdog Disable */
+#define		AT91_WDT_WDD		(0xfff << 16)		/* Delta Value */
+#define		AT91_WDT_WDDBGHLT	(1     << 28)		/* Debug Halt */
+#define		AT91_WDT_WDIDLEHLT	(1     << 29)		/* Idle Halt */
+
+#define AT91_WDT_SR		(AT91_WDT + 0x08)	/* Watchdog Status Register */
+#define		AT91_WDT_WDUNF		(1 << 0)		/* Watchdog Underflow */
+#define		AT91_WDT_WDERR		(1 << 1)		/* Watchdog Error */
+
+#endif

include/at45.h

 
 #ifndef	_AT45_H_
 #define	_AT45_H_
-#ifdef	DATAFLASH_MMC_SELECT
+#ifdef	CONFIG_DATAFLASH_MMC_SELECT
 extern	void AT91F_SelectMMC(void);
 extern	void AT91F_SelectSPI(void);
 extern	int AT91F_GetMuxStatus(void);

include/common.h

@@ -453,6 +453,7 @@ void ft_pci_setup(void *blob, bd_t *bd);
 
 /* $(CPU)/serial.c */
 int	serial_init   (void);
+void	serial_exit   (void);
 void	serial_addr   (unsigned int);
 void	serial_setbrg (void);
 void	serial_putc   (const char);

include/configs/afeb9260.h

@@ -87,6 +87,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
@@ -122,6 +123,7 @@
 #define CONFIG_NET_RETRY_COUNT		20
 
 /* USB */
+#define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1

include/configs/at91cap9adk.h

@@ -107,6 +107,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
@@ -144,6 +145,7 @@
 #define CONFIG_RESET_PHY_R		1
 
 /* USB */
+#define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1

include/configs/at91rm9200dk.h

@@ -88,6 +88,7 @@
  */
 
 /* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_AT91RM9200_USART
 #define CONFIG_DBGU
 #undef CONFIG_USART0
 #undef CONFIG_USART1

include/configs/at91rm9200ek.h

+/*
+ * Ulf Samuelsson <ulf@atmel.com>
+ * Rick Bronson <rick@efn.org>
+ *
+ * Configuration settings for the AT91RM9200EK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ARM asynchronous clock */
+/*
+ * from 18.432 MHz crystal
+ * (18432000 / 4 * 39)
+ */
+#define AT91C_MAIN_CLOCK	179712000
+/*
+ * peripheral clock
+ * (AT91C_MASTER_CLOCK / 3)
+ */
+#define AT91C_MASTER_CLOCK	59904000
+
+#define AT91_SLOW_CLOCK		32768	/* slow clock */
+
+#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
+#define CONFIG_AT91RM9200	1	/* It's an Atmel AT91RM9200 SoC	*/
+#define CONFIG_AT91RM9200EK	1	/* on an AT91RM9200EK Board	*/
+#undef  CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+#define USE_920T_MMU		1
+
+#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG	1
+
+/*
+ * LowLevel Init
+ */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_USE_MAIN_OSCILLATOR		1
+/* flash */
+#define CONFIG_SYS_MC_PUIA_VAL	0x00000000
+#define CONFIG_SYS_MC_PUP_VAL	0x00000000
+#define CONFIG_SYS_MC_PUER_VAL	0x00000000
+#define CONFIG_SYS_MC_ASR_VAL	0x00000000
+#define CONFIG_SYS_MC_AASR_VAL	0x00000000
+#define CONFIG_SYS_EBI_CFGR_VAL	0x00000000
+#define CONFIG_SYS_SMC_CSR0_VAL	0x00003284 /* 16bit, 2 TDF, 4 WS */
+
+/* clocks */
+#define CONFIG_SYS_PLLAR_VAL	0x20263E04 /* 179.712000 MHz for PCK */
+#define CONFIG_SYS_PLLBR_VAL	0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
+/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
+#define CONFIG_SYS_MCKR_VAL	0x00000202
+
+/* sdram */
+#define CONFIG_SYS_PIOC_ASR_VAL	0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
+#define CONFIG_SYS_PIOC_BSR_VAL	0x00000000
+#define CONFIG_SYS_PIOC_PDR_VAL	0xFFFF0000
+#define CONFIG_SYS_EBI_CSA_VAL	0x00000002 /* CS1=CONFIG_SYS_SDRAM */
+#define CONFIG_SYS_SDRC_CR_VAL	0x2188c155 /* set up the CONFIG_SYS_SDRAM */
+#define CONFIG_SYS_SDRAM	0x20000000 /* address of the CONFIG_SYS_SDRAM */
+#define CONFIG_SYS_SDRAM1	0x20000080 /* address of the CONFIG_SYS_SDRAM */
+#define CONFIG_SYS_SDRAM_VAL	0x00000000 /* value written to CONFIG_SYS_SDRAM */
+#define CONFIG_SYS_SDRC_MR_VAL	0x00000002 /* Precharge All */
+#define CONFIG_SYS_SDRC_MR_VAL1	0x00000004 /* refresh */
+#define CONFIG_SYS_SDRC_MR_VAL2	0x00000003 /* Load Mode Register */
+#define CONFIG_SYS_SDRC_MR_VAL3	0x00000000 /* Normal Mode */
+#define CONFIG_SYS_SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
+#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */
+
+/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
+#define CONFIG_SYS_AT91C_BRGR_DIVISOR	33
+
+/*
+ * Memory Configuration
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM			0x20000000
+#define PHYS_SDRAM_SIZE			0x02000000	/* 32 megs */
+
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_END		\
+		(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * UART Configuration
+ *
+ * define one of these to choose the DBGU,
+ * USART0 or USART1 as console
+ */
+#define CONFIG_AT91RM9200_USART
+#define CONFIG_DBGU
+#undef CONFIG_USART0
+#undef CONFIG_USART1
+/* don't include RTS/CTS flow control support	*/
+#undef	CONFIG_HWFLOW
+/* disable modem initialization stuff */
+#undef	CONFIG_MODEM_SUPPORT
+
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
+#define CONFIG_BAUDRATE			115200
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+#undef CONFIG_CMD_LOADS
+
+#include <asm/arch/AT91RM9200.h>	/* needed for port definitions */
+/* Options for MMC/SD Card */
+#define CONFIG_DOS_PARTITION	1
+#undef CONFIG_MMC
+#define CONFIG_SYS_MMC_BASE		0xFFFB4000
+#define CONFIG_SYS_MMC_BLOCKSIZE	512
+
+/*
+ * Network Driver Setting
+ */
+#define CONFIG_DRIVER_ETHER
+#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_AT91C_USE_RMII
+
+/*
+ * AC Characteristics
+ * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
+ */
+#define DATAFLASH_TCSS	(0xC << 16)
+#define DATAFLASH_TCHS	(0x1 << 24)
+
+#if defined(CONFIG_HAS_DATAFLASH)
+#define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
+#define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
+#define CONFIG_SYS_MAX_DATAFLASH_PAGES		16384
+/* Logical adress for CS0 */
+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000
+/* Logical adress for CS3 */
+#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000
+#define	CONFIG_SYS_SUPPORT_BLOCK_ERASE		1
+#define	CONFIG_SYS_DATAFLASH_MMC_PIO		AT91C_PIO_PB22
+#endif
+
+/*
+ * NOR Flash
+ */
+#define CONFIG_SYS_FLASH_BASE			0x10000000
+#define PHYS_FLASH_SIZE				0x800000	/* 8MB */
+#define CONFIG_SYS_FLASH_CFI			1
+#define CONFIG_FLASH_CFI_DRIVER			1
+#define CONFIG_SYS_MAX_FLASH_BANKS		1
+#define CONFIG_SYS_MAX_FLASH_SECT		256
+#define CONFIG_SYS_FLASH_PROTECTION
+
+/*
+ * Environment Settings
+ */
+#ifdef CONFIG_ENV_IS_IN_DATAFLASH
+/*
+ * Datasflash Environment Settings
+ */
+#define CONFIG_ENV_OFFSET			0x4200
+#define CONFIG_ENV_ADDR			\
+		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
+/* 8 * 1056 really , but start.s is not OK with this*/
+#define CONFIG_ENV_SIZE			0x2000
+
+#else
+/*
+ * NOR Flash Environment Settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH		1
+
+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
+/*
+ * between boot.bin and u-boot.bin.gz
+ */
+#define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + 0xe000)
+#define CONFIG_ENV_SIZE			0x10000 /* sectors are 64K here */
+#else
+/*
+ * after u-boot.bin
+ */
+#define CONFIG_ENV_ADDR			\
+		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE			0x10000 /* sectors are 64K here */
+/* The following #defines are needed to get flash environment right */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN		\
+		(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
+#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */
+
+#endif	/* CONFIG_ENV_IS_IN_DATAFLASH */
+
+/*
+ * Boot option
+ */
+#define CONFIG_BOOTDELAY		3
+
+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
+/* boot.bin, env, u-boot.bin.gz */
+#define CONFIG_SYS_BOOT_SIZE		0x6000 /* 24 KBytes */
+#define CONFIG_SYS_U_BOOT_BASE		(CONFIG_SYS_FLASH_BASE + 0x10000)
+#define CONFIG_SYS_U_BOOT_SIZE		0x10000 /* 64 KBytes */
+#else
+/* u-boot.bin */
+#define CONFIG_SYS_BOOT_SIZE		0x0 /* 0 KBytes */
+#define CONFIG_SYS_U_BOOT_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_U_BOOT_SIZE		0x40000 /* 128 KBytes */
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+
+#define CONFIG_SYS_LOAD_ADDR		0x21000000 /* default load address */
+#define CONFIG_ENV_OVERWRITE	1
+
+/*
+ * USB Config
+ */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_OHCI_NEW	1
+#define CONFIG_USB_KEYBOARD	1
+#define CONFIG_USB_STORAGE	1
+#define CONFIG_DOS_PARTITION	1
+
+#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE		AT91_USB_HOST_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91rm9200"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	15
+
+/*
+ * I2C
+ */
+#define CONFIG_HARD_I2C
+
+#ifdef CONFIG_HARD_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_SYS_I2C_SPEED		0	/* not used */
+#define CONFIG_SYS_I2C_SLAVE		0	/* not used */
+#endif
+
+/*
+ * Shell Settings
+ */
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_SYS_LONGHELP		1
+#define CONFIG_AUTO_COMPLETE		1
+#define CONFIG_SYS_HUSH_PARSER		1
+#define CONFIG_SYS_PROMPT		"U-Boot> "
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
+#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		\
+		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#ifndef __ASSEMBLY__
+/*-----------------------------------------------------------------------
+ * Board specific extension for bd_info
+ *
+ * This structure is embedded in the global bd_info (bd_t) structure
+ * and can be used by the board specific code (eg board/...)
+ */
+
+struct bd_info_ext {
+	/* helper variable for board environment handling
+	 *
+	 * env_crc_valid == 0	=>	uninitialised
+	 * env_crc_valid > 0	=>	environment crc in flash is valid
+	 * env_crc_valid < 0	=>	environment crc in flash is invalid
+	 */
+	int env_crc_valid;
+};
+#endif
+
+#define CONFIG_SYS_HZ 1000
+/*
+ * AT91C_TC0_CMR is implicitly set to
+ * AT91C_TC_TIMER_DIV1_CLOCK
+ */
+#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
+
+#define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
+					     , 0x1000)
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+
+#define CONFIG_STACKSIZE		(32 * 1024)	/* regular stack */
+#define CONFIG_STACKSIZE_IRQ		(4 * 1024) /* Unsure if to big or to small*/
+#define CONFIG_STACKSIZE_FIQ		(4 * 1024) /* Unsure if to big or to small*/
+#endif

include/configs/at91sam9260ek.h

@@ -103,6 +103,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
@@ -142,6 +143,7 @@
 #define CONFIG_RESET_PHY_R		1
 
 /* USB */
+#define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1

include/configs/at91sam9261ek.h

@@ -107,6 +107,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
@@ -143,6 +144,7 @@
 #define CONFIG_RESET_PHY_R		1
 
 /* USB */
+#define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1

include/configs/at91sam9263ek.h

@@ -108,6 +108,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
@@ -150,6 +151,7 @@
 #define CONFIG_RESET_PHY_R		1
 
 /* USB */
+#define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1
@@ -202,6 +204,9 @@
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_LONGHELP		1
 #define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 #define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
 /*

include/configs/at91sam9rlek.h

@@ -98,6 +98,7 @@
 #define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
 
 /* DataFlash */
+#define CONFIG_ATMEL_DATAFLASH_SPI
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1

include/configs/cmc_pu2.h

@@ -88,6 +88,7 @@
  */
 
 /* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_AT91RM9200_USART
 #undef CONFIG_DBGU
 #define CONFIG_USART0
 #undef CONFIG_USART1

include/configs/csb637.h

@@ -90,6 +90,7 @@
  */
 
 /* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_AT91RM9200_USART
 #define CONFIG_DBGU
 #undef CONFIG_USART0
 #undef CONFIG_USART1

include/configs/kb9202.h

@@ -72,6 +72,7 @@
  */
 
 /* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_AT91RM9200_USART
 #define CONFIG_DBGU
 #undef CONFIG_USART0
 #undef CONFIG_USART1

include/configs/m501sk.h

@@ -110,6 +110,7 @@
 #define CONFIG_CMC_PU2
 
 /* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_AT91RM9200_USART
 #define CONFIG_DBGU
 #undef CONFIG_USART0
 #undef CONFIG_USART1

include/configs/mp2usb.h

@@ -95,6 +95,7 @@
  */
 
 /* define one of these to choose the DBGU, USART0  or USART1 as console */
+#define CONFIG_AT91RM9200_USART
 #define CONFIG_DBGU
 #undef CONFIG_USART0
 #undef CONFIG_USART1