提交 5dc5a53c 编写于 作者: V Vipul Kumar 提交者: Michal Simek

mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ

This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.
Signed-off-by: NVipul Kumar <vipulk@xilinx.com>
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
上级 71d5a142
...@@ -96,6 +96,9 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED ...@@ -96,6 +96,9 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Overwrite bootmode selected via boot mode pins to tell SPL what should Overwrite bootmode selected via boot mode pins to tell SPL what should
be the next boot device. be the next boot device.
config ZYNQ_SDHCI_MAX_FREQ
default 200000000
config SPL_ZYNQMP_ALT_BOOTMODE config SPL_ZYNQMP_ALT_BOOTMODE
hex hex
default 0x0 if JTAG_MODE default 0x0 if JTAG_MODE
......
...@@ -63,4 +63,7 @@ config BOOT_INIT_FILE ...@@ -63,4 +63,7 @@ config BOOT_INIT_FILE
Add register writes to boot.bin format (max 256 pairs). Add register writes to boot.bin format (max 256 pairs).
Expect a table of register-value pairs, e.g. "0x12345678 0x4321" Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
config ZYNQ_SDHCI_MAX_FREQ
default 52000000
endif endif
...@@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep" ...@@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
CONFIG_ARCH_ZYNQMP=y CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_ZYNQ_SDHCI_MAX_FREQ=52000000
CONFIG_ZYNQMP_USB=y CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART=y
......
...@@ -481,6 +481,12 @@ config MMC_SDHCI_ZYNQ ...@@ -481,6 +481,12 @@ config MMC_SDHCI_ZYNQ
help help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
config ZYNQ_SDHCI_MAX_FREQ
int "Set the maximum frequency of the controller"
depends on MMC_SDHCI_ZYNQ
help
Set the maximum frequency of the controller.
config MMC_SUNXI config MMC_SUNXI
bool "Allwinner sunxi SD/MMC Host Controller support" bool "Allwinner sunxi SD/MMC Host Controller support"
depends on ARCH_SUNXI && !UART0_PORT_F depends on ARCH_SUNXI && !UART0_PORT_F
......
...@@ -56,9 +56,6 @@ ...@@ -56,9 +56,6 @@
#if defined(CONFIG_MMC_SDHCI_ZYNQ) #if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_SUPPORT_EMMC_BOOT # define CONFIG_SUPPORT_EMMC_BOOT
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
# endif
#endif #endif
#ifdef CONFIG_NAND_ARASAN #ifdef CONFIG_NAND_ARASAN
......
...@@ -13,7 +13,6 @@ ...@@ -13,7 +13,6 @@
#ifndef __CONFIG_ZYNQMP_EP_H #ifndef __CONFIG_ZYNQMP_EP_H
#define __CONFIG_ZYNQMP_EP_H #define __CONFIG_ZYNQMP_EP_H
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9) #define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_EEPROM
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
......
...@@ -73,11 +73,6 @@ ...@@ -73,11 +73,6 @@
#define CONFIG_MTD_DEVICE #define CONFIG_MTD_DEVICE
#endif #endif
/* MMC */
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#endif
#ifdef CONFIG_USB_EHCI_ZYNQ #ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI # define CONFIG_EHCI_IS_TDI
......
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