提交 586b15bc 编写于 作者: O Ovidiu Panait 提交者: Tom Rini

common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c

Move the ARM-specific reserve_mmu definition from common/board_f.c
to arch/arm/lib/cache.c.
Signed-off-by: NOvidiu Panait <ovpanait@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
上级 4d131cdb
......@@ -10,6 +10,8 @@
#include <cpu_func.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Flush range from all levels of d-cache/unified-cache.
* Affects the range [start, start + size - 1].
......@@ -118,3 +120,29 @@ void invalidate_l2_cache(void)
isb();
}
#endif
__weak int reserve_mmu(void)
{
#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
/* reserve TLB table */
gd->arch.tlb_size = PGTABLE_SIZE;
gd->relocaddr -= gd->arch.tlb_size;
/* round down to next 64 kB limit */
gd->relocaddr &= ~(0x10000 - 1);
gd->arch.tlb_addr = gd->relocaddr;
debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
gd->arch.tlb_addr + gd->arch.tlb_size);
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
/*
* Record allocated tlb_addr in case gd->tlb_addr to be overwritten
* with location within secure ram.
*/
gd->arch.tlb_allocated = gd->arch.tlb_addr;
#endif
#endif
return 0;
}
......@@ -385,34 +385,6 @@ static int reserve_round_4k(void)
return 0;
}
#ifdef CONFIG_ARM
__weak int reserve_mmu(void)
{
#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
/* reserve TLB table */
gd->arch.tlb_size = PGTABLE_SIZE;
gd->relocaddr -= gd->arch.tlb_size;
/* round down to next 64 kB limit */
gd->relocaddr &= ~(0x10000 - 1);
gd->arch.tlb_addr = gd->relocaddr;
debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
gd->arch.tlb_addr + gd->arch.tlb_size);
#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
/*
* Record allocated tlb_addr in case gd->tlb_addr to be overwritten
* with location within secure ram.
*/
gd->arch.tlb_allocated = gd->arch.tlb_addr;
#endif
#endif
return 0;
}
#endif
static int reserve_video(void)
{
#ifdef CONFIG_DM_VIDEO
......
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