ARM: tegra: Add CPU (armv7) files for Tegra124

These files are for code that runs on the CPU (A15) on Tegra124 boards.
At this time, there is no A15-specific code here. The warmboot/LP0 files
aren't included as that code hasn't been ported yet.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

arch/arm/cpu/armv7/tegra124/Makefile

+#
+# (C) Copyright 2013-2014
+# NVIDIA Corporation <www.nvidia.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#

arch/arm/cpu/armv7/tegra124/config.mk

+#
+# (C) Copyright 2013
+# NVIDIA Corporation <www.nvidia.com>
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+CONFIG_ARCH_DEVICE_TREE := tegra124

arch/arm/cpu/tegra124-common/Makefile

+#
+# (C) Copyright 2013-2014
+# NVIDIA Corporation <www.nvidia.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= clock.o
+obj-y	+= funcmux.o
+obj-y	+= pinmux.o

arch/arm/cpu/tegra124-common/funcmux.c

+/*
+ * (C) Copyright 2013
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/* Tegra124 high-level function multiplexing */
+
+#include <common.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/funcmux.h>
+#include <asm/arch/pinmux.h>
+
+int funcmux_select(enum periph_id id, int config)
+{
+	int bad_config = config != FUNCMUX_DEFAULT;
+
+	switch (id) {
+	case PERIPH_ID_UART4:
+		switch (config) {
+		case FUNCMUX_UART4_GPIO: /* TXD,RXD,CTS,RTS */
+			pinmux_set_func(PINGRP_GPIO_PJ7, PMUX_FUNC_UARTD);
+			pinmux_set_func(PINGRP_GPIO_PB0, PMUX_FUNC_UARTD);
+			pinmux_set_func(PINGRP_GPIO_PB1, PMUX_FUNC_UARTD);
+			pinmux_set_func(PINGRP_GPIO_PK7, PMUX_FUNC_UARTD);
+
+			pinmux_set_io(PINGRP_GPIO_PJ7, PMUX_PIN_OUTPUT);
+			pinmux_set_io(PINGRP_GPIO_PB0, PMUX_PIN_INPUT);
+			pinmux_set_io(PINGRP_GPIO_PB1, PMUX_PIN_INPUT);
+			pinmux_set_io(PINGRP_GPIO_PK7, PMUX_PIN_OUTPUT);
+
+			pinmux_tristate_disable(PINGRP_GPIO_PJ7);
+			pinmux_tristate_disable(PINGRP_GPIO_PB0);
+			pinmux_tristate_disable(PINGRP_GPIO_PB1);
+			pinmux_tristate_disable(PINGRP_GPIO_PK7);
+			break;
+		}
+		break;
+
+	case PERIPH_ID_UART1:
+		switch (config) {
+		case FUNCMUX_UART1_KBC:
+			pinmux_set_func(PINGRP_KB_ROW9, PMUX_FUNC_UARTA);
+			pinmux_set_func(PINGRP_KB_ROW10, PMUX_FUNC_UARTA);
+
+			pinmux_set_io(PINGRP_KB_ROW9, PMUX_PIN_OUTPUT);
+			pinmux_set_io(PINGRP_KB_ROW10, PMUX_PIN_INPUT);
+
+			pinmux_tristate_disable(PINGRP_KB_ROW9);
+			pinmux_tristate_disable(PINGRP_KB_ROW10);
+			break;
+		}
+		break;
+
+	/* Add other periph IDs here as needed */
+
+	default:
+		debug("%s: invalid periph_id %d", __func__, id);
+		return -1;
+	}
+
+	if (bad_config) {
+		debug("%s: invalid config %d for periph_id %d", __func__,
+		      config, id);
+		return -1;
+	}
+	return 0;
+}