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提交 4d764244 编写于 作者: M Masahiro Yamada 提交者： Tom Rini
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drivers: delete unused header files 

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
上级 3b98b57f
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drivers/mmc/pxa_mmc.h 已删除 100644 → 0
浏览文件 @ 3b98b57f
/*
* linux/drivers/mmc/mmc_pxa.h
*
* Author: Vladimir Shebordaev, Igor Oblakov
* Copyright: MontaVista Software Inc.
*
* $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MMC_PXA_P_H__
#define __MMC_PXA_P_H__
/* PXA-250 MMC controller registers */
/* MMC_STRPCL */
#define MMC_STRPCL_STOP_CLK (0x0001UL)
#define MMC_STRPCL_START_CLK (0x0002UL)
/* MMC_STAT */
#define MMC_STAT_END_CMD_RES (0x0001UL << 13)
#define MMC_STAT_PRG_DONE (0x0001UL << 12)
#define MMC_STAT_DATA_TRAN_DONE (0x0001UL << 11)
#define MMC_STAT_CLK_EN (0x0001UL << 8)
#define MMC_STAT_RECV_FIFO_FULL (0x0001UL << 7)
#define MMC_STAT_XMIT_FIFO_EMPTY (0x0001UL << 6)
#define MMC_STAT_RES_CRC_ERROR (0x0001UL << 5)
#define MMC_STAT_SPI_READ_ERROR_TOKEN (0x0001UL << 4)
#define MMC_STAT_CRC_READ_ERROR (0x0001UL << 3)
#define MMC_STAT_CRC_WRITE_ERROR (0x0001UL << 2)
#define MMC_STAT_TIME_OUT_RESPONSE (0x0001UL << 1)
#define MMC_STAT_READ_TIME_OUT (0x0001UL)
#define MMC_STAT_ERRORS (MMC_STAT_RES_CRC_ERROR|MMC_STAT_SPI_READ_ERROR_TOKEN\
|MMC_STAT_CRC_READ_ERROR|MMC_STAT_TIME_OUT_RESPONSE\
|MMC_STAT_READ_TIME_OUT|MMC_STAT_CRC_WRITE_ERROR)
/* MMC_CLKRT */
#define MMC_CLKRT_20MHZ (0x0000UL)
#define MMC_CLKRT_10MHZ (0x0001UL)
#define MMC_CLKRT_5MHZ (0x0002UL)
#define MMC_CLKRT_2_5MHZ (0x0003UL)
#define MMC_CLKRT_1_25MHZ (0x0004UL)
#define MMC_CLKRT_0_625MHZ (0x0005UL)
#define MMC_CLKRT_0_3125MHZ (0x0006UL)
/* MMC_SPI */
#define MMC_SPI_DISABLE (0x00UL)
#define MMC_SPI_EN (0x01UL)
#define MMC_SPI_CS_EN (0x01UL << 2)
#define MMC_SPI_CS_ADDRESS (0x01UL << 3)
#define MMC_SPI_CRC_ON (0x01UL << 1)
/* MMC_CMDAT */
#define MMC_CMDAT_SD_4DAT (0x0001UL << 8)
#define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7)
#define MMC_CMDAT_INIT (0x0001UL << 6)
#define MMC_CMDAT_BUSY (0x0001UL << 5)
#define MMC_CMDAT_BCR (0x0003UL << 5)
#define MMC_CMDAT_STREAM (0x0001UL << 4)
#define MMC_CMDAT_BLOCK (0x0000UL << 4)
#define MMC_CMDAT_WRITE (0x0001UL << 3)
#define MMC_CMDAT_READ (0x0000UL << 3)
#define MMC_CMDAT_DATA_EN (0x0001UL << 2)
#define MMC_CMDAT_R0 (0)
#define MMC_CMDAT_R1 (0x0001UL)
#define MMC_CMDAT_R2 (0x0002UL)
#define MMC_CMDAT_R3 (0x0003UL)
/* MMC_RESTO */
#define MMC_RES_TO_MAX (0x007fUL) /* [6:0] */
/* MMC_RDTO */
#define MMC_READ_TO_MAX (0x0ffffUL) /* [15:0] */
/* MMC_BLKLEN */
#define MMC_BLK_LEN_MAX (0x03ffUL) /* [9:0] */
/* MMC_PRTBUF */
#define MMC_PRTBUF_BUF_PART_FULL (0x01UL)
#define MMC_PRTBUF_BUF_FULL (0x00UL )
/* MMC_I_MASK */
#define MMC_I_MASK_TXFIFO_WR_REQ (0x01UL << 6)
#define MMC_I_MASK_RXFIFO_RD_REQ (0x01UL << 5)
#define MMC_I_MASK_CLK_IS_OFF (0x01UL << 4)
#define MMC_I_MASK_STOP_CMD (0x01UL << 3)
#define MMC_I_MASK_END_CMD_RES (0x01UL << 2)
#define MMC_I_MASK_PRG_DONE (0x01UL << 1)
#define MMC_I_MASK_DATA_TRAN_DONE (0x01UL)
#define MMC_I_MASK_ALL (0x07fUL)
/* MMC_I_REG */
#define MMC_I_REG_TXFIFO_WR_REQ (0x01UL << 6)
#define MMC_I_REG_RXFIFO_RD_REQ (0x01UL << 5)
#define MMC_I_REG_CLK_IS_OFF (0x01UL << 4)
#define MMC_I_REG_STOP_CMD (0x01UL << 3)
#define MMC_I_REG_END_CMD_RES (0x01UL << 2)
#define MMC_I_REG_PRG_DONE (0x01UL << 1)
#define MMC_I_REG_DATA_TRAN_DONE (0x01UL)
#define MMC_I_REG_ALL (0x007fUL)
/* MMC_CMD */
#define MMC_CMD_INDEX_MAX (0x006fUL) /* [5:0] */
#define CMD(x) (x)
#define MMC_DEFAULT_RCA 1
#define MMC_BLOCK_SIZE 512
#define MMC_MAX_BLOCK_SIZE 512
#define MMC_R1_IDLE_STATE 0x01
#define MMC_R1_ERASE_STATE 0x02
#define MMC_R1_ILLEGAL_CMD 0x04
#define MMC_R1_COM_CRC_ERR 0x08
#define MMC_R1_ERASE_SEQ_ERR 0x01
#define MMC_R1_ADDR_ERR 0x02
#define MMC_R1_PARAM_ERR 0x04
#define MMC_R1B_WP_ERASE_SKIP 0x0002
#define MMC_R1B_ERR 0x0004
#define MMC_R1B_CC_ERR 0x0008
#define MMC_R1B_CARD_ECC_ERR 0x0010
#define MMC_R1B_WP_VIOLATION 0x0020
#define MMC_R1B_ERASE_PARAM 0x0040
#define MMC_R1B_OOR 0x0080
#define MMC_R1B_IDLE_STATE 0x0100
#define MMC_R1B_ERASE_RESET 0x0200
#define MMC_R1B_ILLEGAL_CMD 0x0400
#define MMC_R1B_COM_CRC_ERR 0x0800
#define MMC_R1B_ERASE_SEQ_ERR 0x1000
#define MMC_R1B_ADDR_ERR 0x2000
#define MMC_R1B_PARAM_ERR 0x4000
#endif /* __MMC_PXA_P_H__ */
drivers/net/nicext.h 已删除 100644 → 0
浏览文件 @ 3b98b57f
/****************************************************************************
* Copyright(c) 2000-2001 Broadcom Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation.
*
* Name: nicext.h
*
* Description: Broadcom Network Interface Card Extension (NICE) is an
* extension to Linux NET device kernel mode drivers.
* NICE is designed to provide additional functionalities,
* such as receive packet intercept. To support Broadcom NICE,
* the network device driver can be modified by adding an
* device ioctl handler and by indicating receiving packets
* to the NICE receive handler. Broadcom NICE will only be
* enabled by a NICE-aware intermediate driver, such as
* Broadcom Advanced Server Program Driver (BASP). When NICE
* is not enabled, the modified network device drivers
* functions exactly as other non-NICE aware drivers.
*
* Author: Frankie Fan
*
* Created: September 17, 2000
*
****************************************************************************/
#ifndef _nicext_h_
#define _nicext_h_
/*
* ioctl for NICE
*/
#define SIOCNICE SIOCDEVPRIVATE+7
/*
* SIOCNICE:
*
* The following structure needs to be less than IFNAMSIZ (16 bytes) because
* we're overloading ifreq.ifr_ifru.
*
* If 16 bytes is not enough, we should consider relaxing this because
* this is no field after ifr_ifru in the ifreq structure. But we may
* run into future compatiability problem in case of changing struct ifreq.
*/
struct nice_req
{
__u32 cmd;
union
{
#ifdef __KERNEL__
/* cmd = NICE_CMD_SET_RX or NICE_CMD_GET_RX */
struct
{
void (*nrqus1_rx)( struct sk_buff*, void* );
void* nrqus1_ctx;
} nrqu_nrqus1;
/* cmd = NICE_CMD_QUERY_SUPPORT */
struct
{
__u32 nrqus2_magic;
__u32 nrqus2_support_rx:1;
__u32 nrqus2_support_vlan:1;
__u32 nrqus2_support_get_speed:1;
} nrqu_nrqus2;
#endif
/* cmd = NICE_CMD_GET_SPEED */
struct
{
unsigned int nrqus3_speed; /* 0 if link is down, */
/* otherwise speed in Mbps */
} nrqu_nrqus3;
/* cmd = NICE_CMD_BLINK_LED */
struct
{
unsigned int nrqus4_blink_time; /* blink duration in seconds */
} nrqu_nrqus4;
} nrq_nrqu;
};
#define nrq_rx nrq_nrqu.nrqu_nrqus1.nrqus1_rx
#define nrq_ctx nrq_nrqu.nrqu_nrqus1.nrqus1_ctx
#define nrq_support_rx nrq_nrqu.nrqu_nrqus2.nrqus2_support_rx
#define nrq_magic nrq_nrqu.nrqu_nrqus2.nrqus2_magic
#define nrq_support_vlan nrq_nrqu.nrqu_nrqus2.nrqus2_support_vlan
#define nrq_support_get_speed nrq_nrqu.nrqu_nrqus2.nrqus2_support_get_speed
#define nrq_speed nrq_nrqu.nrqu_nrqus3.nrqus3_speed
#define nrq_blink_time nrq_nrqu.nrqu_nrqus4.nrqus4_blink_time
/*
* magic constants
*/
#define NICE_REQUESTOR_MAGIC 0x4543494E /* NICE in ascii */
#define NICE_DEVICE_MAGIC 0x4E494345 /* ECIN in ascii */
/*
* command field
*/
#define NICE_CMD_QUERY_SUPPORT 0x00000001
#define NICE_CMD_SET_RX 0x00000002
#define NICE_CMD_GET_RX 0x00000003
#define NICE_CMD_GET_SPEED 0x00000004
#define NICE_CMD_BLINK_LED 0x00000005
#endif /* _nicext_h_ */
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