Fix 8313ERDB board configuration
Change LCRR clock ratio from 2 to 4 to commodate VSC7385. Correct TSEC1 vs TSEC2 assignment. Define ETHADDR and ETH1ADDR always. Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NTimur Tabi <timur@freescale.com>
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