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体验新版 GitCode,发现更多精彩内容 >>
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45ea3fca
编写于
12月 14, 2004
作者:
W
wdenk
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
Cleanup for CMC_PU2 board
上级
96085e34
变更
4
隐藏空白更改
内联
并排
Showing
4 changed file
with
57 addition
and
70 deletion
+57
-70
board/cmc_pu2/flash.c
board/cmc_pu2/flash.c
+11
-7
board/purple/u-boot.lds
board/purple/u-boot.lds
+3
-3
cpu/at91rm9200/i2c.c
cpu/at91rm9200/i2c.c
+6
-10
include/configs/cmc_pu2.h
include/configs/cmc_pu2.h
+37
-50
未找到文件。
board/cmc_pu2/flash.c
浏览文件 @
45ea3fca
...
...
@@ -29,6 +29,10 @@
#include <common.h>
#ifndef CFG_ENV_ADDR
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
#endif
flash_info_t
flash_info
[
CFG_MAX_FLASH_BANKS
];
/* info for FLASH chips */
/*
...
...
@@ -194,12 +198,12 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
switch
(
addr
[
0
]
&
0xff
)
{
case
(
uchar
)
AMD_MANUFACT
:
printf
(
"Manufacturer: AMD (Spansion)
\n
"
);
debug
(
"Manufacturer: AMD (Spansion)
\n
"
);
info
->
flash_id
=
FLASH_MAN_AMD
;
break
;
case
(
uchar
)
INTEL_MANUFACT
:
printf
(
"Manufacturer: Intel (not supported yet)
\n
"
);
debug
(
"Manufacturer: Intel (not supported yet)
\n
"
);
info
->
flash_id
=
FLASH_MAN_INTEL
;
break
;
...
...
@@ -214,7 +218,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
if
(
info
->
flash_id
!=
FLASH_UNKNOWN
)
switch
((
FPW
)
addr
[
1
])
{
case
AMD_ID_MIRROR
:
printf
(
"Mirror Bit flash: addr[14] = %08X addr[15] = %08X
\n
"
,
debug
(
"Mirror Bit flash: addr[14] = %08X addr[15] = %08X
\n
"
,
addr
[
14
],
addr
[
15
]);
switch
(
addr
[
14
]
&
0xffff
)
{
...
...
@@ -225,7 +229,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
info
->
sector_count
=
0
;
info
->
size
=
0
;
}
else
{
printf
(
"Chip: S29GL064M-R6
\n
"
);
debug
(
"Chip: S29GL064M-R6
\n
"
);
info
->
flash_id
+=
FLASH_S29GL064M
;
info
->
sector_count
=
128
;
info
->
size
=
0x00800000
;
...
...
@@ -265,16 +269,16 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
int
flag
,
prot
,
sect
,
ssect
,
l_sect
;
ulong
start
,
now
,
last
;
printf
(
"flash_erase: first: %d last: %d
\n
"
,
s_first
,
s_last
);
debug
(
"flash_erase: first: %d last: %d
\n
"
,
s_first
,
s_last
);
if
((
s_first
<
0
)
||
(
s_first
>
s_last
))
{
if
(
info
->
flash_id
==
FLASH_UNKNOWN
)
{
printf
(
"- missing
\n
"
);
}
else
{
printf
(
"- no sectors to erase
\n
"
);
}
}
return
1
;
}
}
if
((
info
->
flash_id
==
FLASH_UNKNOWN
)
||
(
info
->
flash_id
>
FLASH_AMD_COMP
))
{
...
...
board/purple/u-boot.lds
浏览文件 @
45ea3fca
...
...
@@ -64,9 +64,9 @@ SECTIONS
.sdata : { *(.sdata) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
uboot_end_data = .;
num_got_entries = (__got_end - __got_start) >> 2;
...
...
cpu/at91rm9200/i2c.c
浏览文件 @
45ea3fca
...
...
@@ -33,7 +33,7 @@
#include <at91rm9200_i2c.h>
static
int
debug
=
0
;
/* define DEBUG */
/*
* Poll the i2c status register until the specified bit is set.
...
...
@@ -79,15 +79,13 @@ at91_xfer(unsigned char chip, unsigned int addr, int alen,
twi
->
TWI_CR
=
AT91C_TWI_STOP
;
/* Wait until transfer is finished */
if
(
!
at91_poll_status
(
twi
,
AT91C_TWI_RXRDY
))
{
if
(
debug
)
printf
(
"at91_i2c: timeout 1
\n
"
);
debug
(
"at91_i2c: timeout 1
\n
"
);
return
1
;
}
*
buf
++
=
twi
->
TWI_RHR
;
}
if
(
!
at91_poll_status
(
twi
,
AT91C_TWI_TXCOMP
))
{
if
(
debug
)
printf
(
"at91_i2c: timeout 2
\n
"
);
debug
(
"at91_i2c: timeout 2
\n
"
);
return
1
;
}
}
else
{
...
...
@@ -97,15 +95,13 @@ at91_xfer(unsigned char chip, unsigned int addr, int alen,
if
(
!
length
)
twi
->
TWI_CR
=
AT91C_TWI_STOP
;
if
(
!
at91_poll_status
(
twi
,
AT91C_TWI_TXRDY
))
{
if
(
debug
)
printf
(
"at91_i2c: timeout 3
\n
"
);
debug
(
"at91_i2c: timeout 3
\n
"
);
return
1
;
}
}
/* Wait until transfer is finished */
if
(
!
at91_poll_status
(
twi
,
AT91C_TWI_TXCOMP
))
{
if
(
debug
)
printf
(
"at91_i2c: timeout 4
\n
"
);
debug
(
"at91_i2c: timeout 4
\n
"
);
return
1
;
}
}
...
...
@@ -190,7 +186,7 @@ i2c_init(int speed, int slaveaddr)
/* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
twi
->
TWI_CWGR
=
AT91C_TWI_CKDIV1
|
AT91C_TWI_CLDIV3
|
(
AT91C_TWI_CLDIV3
<<
8
);
printf
(
"Found AT91 i2c
\n
"
);
debug
(
"Found AT91 i2c
\n
"
);
return
;
}
#endif
/* CONFIG_HARD_I2C */
include/configs/cmc_pu2.h
浏览文件 @
45ea3fca
...
...
@@ -13,7 +13,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
...
...
@@ -38,7 +38,7 @@
#define AT91_SLOW_CLOCK 32768
/* slow clock */
#define CONFIG_AT91RM9200DK 1
/* on an AT91RM9200DK Board */
#define CONFIG_CMC_PU2
1
/* on an CMC_PU2 Board */
#define CONFIG_CMC_PU2
1
/* on an CMC_PU2 Board */
#undef CONFIG_USE_IRQ
/* we don't need IRQ/FIQ stuff */
#define CONFIG_CMDLINE_TAG 1
/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
...
...
@@ -58,7 +58,7 @@
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE 128
/* size in bytes reserved for initial data */
#define CONFIG_BAUDRATE
9600
#define CONFIG_BAUDRATE
9600
#define CFG_AT91C_BRGR_DIVISOR 450
/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
...
...
@@ -78,11 +78,11 @@
#define CONFIG_HARD_I2C
#ifdef CONFIG_HARD_I2C
#define CFG_I2C_SPEED
0
/* not used */
#define CFG_I2C_SLAVE
0
/* not used */
#define CONFIG_RTC_RS5C372A
/* RICOH I2C RTC */
#define CFG_I2C_RTC_ADDR
0x32
#define CFG_I2C_EEPROM_ADDR
0x50
#define CFG_I2C_SPEED
0
/* not used */
#define CFG_I2C_SLAVE
0
/* not used */
#define CONFIG_RTC_RS5C372A
/* RICOH I2C RTC */
#define CFG_I2C_RTC_ADDR
0x32
#define CFG_I2C_EEPROM_ADDR
0x50
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_I2C_EEPROM_ADDR_OVERFLOW
#endif
...
...
@@ -90,44 +90,33 @@
#define CFG_LONGHELP
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_ENV_OVERWRITE 1 */
#ifdef CONFIG_HARD_I2C
#define CONFIG_COMMANDS \
((CONFIG_CMD_DFL | \
CFG_CMD_I2C | \
CFG_CMD_DATE | \
CFG_CMD_EEPROM | \
CFG_CMD_DHCP ) & \
~(CFG_CMD_BDI | \
CFG_CMD_IMI | \
CFG_CMD_AUTOSCRIPT | \
CFG_CMD_FPGA | \
CFG_CMD_MISC | \
CFG_CMD_LOADS ))
((CONFIG_CMD_DFL | \
CFG_CMD_I2C | \
CFG_CMD_DATE | \
CFG_CMD_EEPROM | \
CFG_CMD_DHCP ) & \
~(CFG_CMD_FPGA | CFG_CMD_MISC) )
#else
#define CONFIG_COMMANDS \
((CONFIG_CMD_DFL | \
CFG_CMD_DHCP ) & \
~(CFG_CMD_BDI | \
CFG_CMD_IMI | \
CFG_CMD_AUTOSCRIPT | \
CFG_CMD_FPGA | \
CFG_CMD_MISC | \
CFG_CMD_LOADS ))
((CONFIG_CMD_DFL | \
CFG_CMD_DHCP ) & \
~(CFG_CMD_FPGA | CFG_CMD_MISC) )
#define CONFIG_TIMESTAMP
#endif
/* still about 20 kB free with this defined */
#define CFG_LONGHELP
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#define AT91_SMART_MEDIA_ALE
(1 << 22)
/* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE
(1 << 21)
/* our CLE is AD21 */
#define AT91_SMART_MEDIA_ALE
(1 << 22)
/* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE
(1 << 21)
/* our CLE is AD21 */
#define CONFIG_NR_DRAM_BANKS
1
#define PHYS_SDRAM
0x20000000
#define PHYS_SDRAM_SIZE
0x1000000
/* 16 megs */
#define CONFIG_NR_DRAM_BANKS
1
#define PHYS_SDRAM
0x20000000
#define PHYS_SDRAM_SIZE
0x1000000
/* 16 megs */
#define CFG_MEMTEST_START PHYS_SDRAM
#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
...
...
@@ -138,34 +127,32 @@
#define CONFIG_HAS_DATAFLASH 1
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
#define CFG_MAX_DATAFLASH_BANKS
2
#define CFG_MAX_DATAFLASH_PAGES
16384
#define CFG_MAX_DATAFLASH_BANKS
2
#define CFG_MAX_DATAFLASH_PAGES
16384
#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
/* Logical adress for CS0 */
#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
/* Logical adress for CS3 */
#define PHYS_FLASH_1 0x10000000
#define PHYS_FLASH_SIZE 0x800000
/* 8 megs main flash */
#define CFG_FLASH_BASE PHYS_FLASH_1
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MAX_FLASH_BANKS 1
#define CFG_MAX_FLASH_SECT 256
#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ)
/* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ)
/* Timeout for Flash Write */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000)
/* after u-boot.bin */
#define CFG_ENV_SIZE 0x10000
/* sectors are 64K here */
#define CFG_ENV_OFFSET 0x20000
/* after u-boot.bin */
#define CFG_ENV_SECT_SIZE (64 << 10)
/* sectors are 64 kB */
#define CFG_ENV_SIZE (16 << 10)
/* Use only 16 kB */
#define CFG_LOAD_ADDR 0x21000000
/* default load address */
#define CFG_BOOT_SIZE 0x00
/* 0 KBytes */
#define CFG_U_BOOT_BASE PHYS_FLASH_1
#define CFG_U_BOOT_SIZE 0x20000
/* 128 KBytes */
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
#define CFG_PROMPT "
cmc> "
/* Monitor Command Prompt */
#define CFG_PROMPT "
=> "
/* Monitor Command Prompt */
#define CFG_CBSIZE 256
/* Console I/O Buffer Size */
#define CFG_MAXARGS
16
/* max number of command args */
#define CFG_MAXARGS
32
/* max number of command args */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
/* Print Buffer Size */
#ifndef __ASSEMBLY__
...
...
@@ -179,13 +166,13 @@
struct
bd_info_ext
{
/* helper variable for board environment handling
*
* env_crc_valid == 0
=> uninitialised
* env_crc_valid > 0
=> environment crc in flash is valid
* env_crc_valid < 0
=> environment crc in flash is invalid
* env_crc_valid == 0
=> uninitialised
* env_crc_valid > 0
=> environment crc in flash is valid
* env_crc_valid < 0
=> environment crc in flash is invalid
*/
int
env_crc_valid
;
};
#endif
#endif
/* __ASSEMBLY__ */
#define CFG_HZ 1000
#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2
/* AT91C_TC0_CMR is implicitly set to */
...
...
@@ -197,4 +184,4 @@ struct bd_info_ext {
#error CONFIG_USE_IRQ not supported
#endif
#endif
#endif
/* __CONFIG_H */
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