Merge branch '2019-11-04-ti-imports'

- Various CPSW related improvements, DTS resync

arch/arm/dts/am335x-baltos.dts

@@ -409,16 +409,26 @@
 	pinctrl-1 = <&davinci_mdio_sleep>;
 
 	status = "okay";
+
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+
+	phy1: ethernet-phy@7 {
+		reg = <7>;
+		eee-broken-100tx;
+		eee-broken-1000t;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&phy0>;
 	phy-mode = "rmii";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <7>;
+	phy-handle = <&phy1>;
 	phy-mode = "rgmii-txid";
 	dual_emac_res_vlan = <2>;
 };

arch/arm/dts/am335x-bone-common.dtsi

@@ -360,16 +360,12 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
-	phy-mode = "mii";
-};
-
-&cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "mii";
 };
 
 &mac {
+	slaves = <1>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&cpsw_default>;
 	pinctrl-1 = <&cpsw_sleep>;
@@ -381,6 +377,10 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
 };
 
 &mmc1 {

arch/arm/dts/am335x-brsmarc1.dts

@@ -247,6 +247,14 @@
 
 &davinci_mdio {
 	status = "okay";
+
+	ethphy0: ethernet-phy@1 {
+		reg = <1>;
+	};
+
+	ethphy1: ethernet-phy@3 {
+		reg = <3>;
+	};
 };
 
 &mac {
@@ -258,13 +266,13 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rmii";
 	ti,ledcr = <0x0480>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rmii";
 	ti,ledcr = <0x0480>;
 };

arch/arm/dts/am335x-brxre1.dts

@@ -206,6 +206,14 @@
 
 &davinci_mdio {
 	status = "okay";
+
+	ethphy0: ethernet-phy@1 {
+		reg = <1>;
+	};
+
+	ethphy1: ethernet-phy@2 {
+		reg = <2>;
+	};
 };
 
 &mac {
@@ -213,12 +221,12 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "mii";
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <2>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "mii";
 };
 

arch/arm/dts/am335x-chiliboard.dts

@@ -140,10 +140,14 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rmii";
 };
 

arch/arm/dts/am335x-draco.dts

@@ -143,7 +143,7 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&mdio0>, <0>;
+	phy-handle = <&phy0>;
 	phy-mode = "rmii";
 };
 

arch/arm/dts/am335x-evm.dts

@@ -675,6 +675,7 @@
 	pinctrl-0 = <&cpsw_default>;
 	pinctrl-1 = <&cpsw_sleep>;
 	status = "okay";
+	slaves = <1>;
 };
 
 &davinci_mdio {
@@ -682,16 +683,15 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
-};
 
-&cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
-	phy-mode = "rgmii-txid";
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
 };
 
-&cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
-	phy-mode = "rgmii-txid";
+&cpsw_emac0 {
+	phy-handle = <&ethphy0>;
+	phy-mode = "rgmii-id";
 };
 
 &tscadc {

arch/arm/dts/am335x-evmsk.dts

@@ -630,17 +630,25 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+
+	ethphy1: ethernet-phy@1 {
+		reg = <1>;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
-	phy-mode = "rgmii-txid";
+	phy-handle = <&ethphy0>;
+	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
-	phy-mode = "rgmii-txid";
+	phy-handle = <&ethphy1>;
+	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <2>;
 };
 

arch/arm/dts/am335x-icev2.dts

@@ -397,13 +397,13 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rmii";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rmii";
 	dual_emac_res_vlan = <2>;
 };
@@ -427,4 +427,12 @@
 	status = "okay";
 	reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
 	reset-delay-us = <2>;   /* PHY datasheet states 1uS min */
+
+	ethphy0: ethernet-phy@1 {
+		reg = <1>;
+	};
+
+	ethphy1: ethernet-phy@3 {
+		reg = <3>;
+	};
 };

arch/arm/dts/am335x-igep0033.dtsi

@@ -102,15 +102,23 @@
 
 &davinci_mdio {
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+
+	ethphy1: ethernet-phy@1 {
+		reg = <1>;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rmii";
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rmii";
 };
 

arch/arm/dts/am335x-pxm2.dtsi

@@ -117,12 +117,12 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii-txid";
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rgmii-txid";
 };
 
@@ -131,6 +131,14 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+
+	ethphy1: ethernet-phy@1 {
+		reg = <1>;
+	};
 };
 
 &elm {

arch/arm/dts/am335x-rut.dts

@@ -149,13 +149,8 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <1>;
-	phy-mode = "rmii";
-};
-
-&cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <0>;
 	phy-mode = "rmii";
+	phy-handle = <&ethernet_phy>;
 };
 
 &davinci_mdio {

arch/arm/dts/am335x-shc.dts

@@ -197,17 +197,17 @@
 	};
 };
 
+&cpsw_emac0 {
+	phy-mode = "mii";
+	phy-handle = <&ethernetphy0>;
+};
+
 &mac {
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&cpsw_default>;
 	pinctrl-1 = <&cpsw_sleep>;
 	status = "okay";
 	slaves = <1>;
-	cpsw_emac0: slave@4a100200  {
-		phy_id = <&davinci_mdio>, <0>;
-		phy-mode = "mii";
-		phy-handle = <&ethernetphy0>;
-	};
 };
 
 &mmc1 {

arch/arm/dts/am335x-sl50.dts

@@ -507,13 +507,8 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
-	phy-mode = "mii";
-};
-
-&cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
 	phy-mode = "mii";
+	phy-handle = <&ethphy0>;
 };
 
 &mac {
@@ -528,6 +523,12 @@
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
+	reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <100>;   /* PHY datasheet states 100us min */
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
 };
 
 &sham {

arch/arm/dts/am437x-gp-evm.dts

@@ -645,10 +645,14 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii";
 };
 

arch/arm/dts/am437x-idk-evm.dts

@@ -385,6 +385,7 @@
 };
 
 &mac {
+	slaves = <1>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&cpsw_default>;
 	pinctrl-1 = <&cpsw_sleep>;
@@ -396,10 +397,14 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii";
 };
 

arch/arm/dts/am437x-sk-evm.dts

@@ -626,16 +626,24 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
+
+	ethphy0: ethernet-phy@4 {
+		reg = <4>;
+	};
+
+	ethphy1: ethernet-phy@5 {
+		reg = <5>;
+	};
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <4>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <5>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rgmii";
 	dual_emac_res_vlan = <2>;
 };

arch/arm/dts/am43x-epos-evm.dts

@@ -389,6 +389,7 @@
 	pinctrl-0 = <&cpsw_default>;
 	pinctrl-1 = <&cpsw_sleep>;
 	status = "okay";
+	slaves = <1>;
 };
 
 &davinci_mdio {
@@ -396,15 +397,14 @@
 	pinctrl-0 = <&davinci_mdio_default>;
 	pinctrl-1 = <&davinci_mdio_sleep>;
 	status = "okay";
-};
 
-&cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <16>;
-	phy-mode = "rmii";
+	ethphy0: ethernet-phy@16 {
+		reg = <16>;
+	};
 };
 
-&cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
+&cpsw_emac0 {
+	phy-handle = <&ethphy0>;
 	phy-mode = "rmii";
 };
 

arch/arm/dts/am57xx-idk-common.dtsi

@@ -372,17 +372,27 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <0>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <1>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rgmii";
 	dual_emac_res_vlan = <2>;
 };
 
+&davinci_mdio {
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+
+	ethphy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &usb2_phy1 {
 	phy-supply = <&ldousb_reg>;
 };

arch/arm/dts/dra7-evm.dts

@@ -479,17 +479,27 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <2>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&ethphy1>;
 	phy-mode = "rgmii";
 	dual_emac_res_vlan = <2>;
 };
 
+&davinci_mdio {
+	ethphy0: ethernet-phy@2 {
+		reg = <2>;
+	};
+
+	ethphy1: ethernet-phy@3 {
+		reg = <3>;
+	};
+};
+
 &dcan1 {
 	status = "ok";
 	pinctrl-names = "default", "sleep", "active";

arch/arm/dts/dra71-evm.dts

@@ -201,13 +201,13 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <2>;
+	phy-handle = <&dp83867_0>;
 	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&dp83867_1>;
 	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <2>;
 };

arch/arm/dts/dra72-evm-revc.dts

@@ -61,13 +61,13 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <2>;
+	phy-handle = <&dp83867_0>;
 	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&dp83867_1>;
 	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <2>;
 };

arch/arm/dts/dra72-evm.dts

@@ -51,10 +51,16 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&ethphy0>;
 	phy-mode = "rgmii";
 };
 
+&davinci_mdio {
+	ethphy0: ethernet-phy@3 {
+		reg = <3>;
+	};
+};
+
 &mmc1 {
 	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
 	pinctrl-0 = <&mmc1_pins_default>;

arch/arm/dts/dra76-evm.dts

@@ -341,13 +341,13 @@
 };
 
 &cpsw_emac0 {
-	phy_id = <&davinci_mdio>, <2>;
+	phy-handle = <&dp83867_0>;
 	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-	phy_id = <&davinci_mdio>, <3>;
+	phy-handle = <&dp83867_1>;
 	phy-mode = "rgmii-id";
 	dual_emac_res_vlan = <2>;
 };

drivers/net/ti/am65-cpsw-nuss.c

@@ -234,11 +234,11 @@ static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
 		break;
 
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
 		mode = AM65_GMII_SEL_MODE_RGMII;
 		break;
 
 	case PHY_INTERFACE_MODE_RGMII_ID:
-	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_TXID:
 		mode = AM65_GMII_SEL_MODE_RGMII;
 		rgmii_id = true;

drivers/net/ti/cpsw.c

@@ -19,12 +19,9 @@
 #include <phy.h>
 #include <asm/arch/cpu.h>
 #include <dm.h>
-#include <fdt_support.h>
 
 #include "cpsw_mdio.h"
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define BITMASK(bits)		(BIT(bits) - 1)
 #define NUM_DESCS		(PKTBUFSRX * 2)
 #define PKT_MIN			60
@@ -33,6 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define GIGABITEN		BIT(7)
 #define FULLDUPLEXEN		BIT(0)
 #define MIIEN			BIT(15)
+#define CTL_EXT_EN		BIT(18)
 /* DMA Registers */
 #define CPDMA_TXCONTROL		0x004
 #define CPDMA_RXCONTROL		0x014
@@ -489,6 +487,8 @@ static int cpsw_slave_update_link(struct cpsw_slave *slave,
 			mac_control |= FULLDUPLEXEN;
 		if (phy->speed == 100)
 			mac_control |= MIIEN;
+		if (phy->speed == 10 && phy_interface_is_rgmii(phy))
+			mac_control |= CTL_EXT_EN;
 	}
 
 	if (mac_control == slave->mac_control)
@@ -836,6 +836,7 @@ static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave)
 {
 	struct phy_device *phydev;
 	u32 supported = PHY_GBIT_FEATURES;
+	int ret;
 
 	phydev = phy_connect(priv->bus,
 			slave->data->phy_addr,
@@ -846,11 +847,18 @@ static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave)
 		return -1;
 
 	phydev->supported &= supported;
+	if (slave->data->max_speed) {
+		ret = phy_set_supported(phydev, slave->data->max_speed);
+		if (ret)
+			return ret;
+		dev_dbg(priv->dev, "Port %u speed forced to %uMbit\n",
+			slave->slave_num + 1, slave->data->max_speed);
+	}
 	phydev->advertising = phydev->supported;
 
 #ifdef CONFIG_DM_ETH
-	if (slave->data->phy_of_handle)
-		phydev->node = offset_to_ofnode(slave->data->phy_of_handle);
+	if (ofnode_valid(slave->data->phy_of_handle))
+		phydev->node = slave->data->phy_of_handle;
 #endif
 
 	priv->phydev = phydev;
@@ -1038,12 +1046,6 @@ static const struct eth_ops cpsw_eth_ops = {
 	.stop		= cpsw_eth_stop,
 };
 
-static inline fdt_addr_t cpsw_get_addr_by_node(const void *fdt, int node)
-{
-	return fdtdec_get_addr_size_auto_noparent(fdt, node, "reg", 0, NULL,
-						  false);
-}
-
 static void cpsw_gmii_sel_am3352(struct cpsw_priv *priv,
 				 phy_interface_t phy_mode)
 {
@@ -1061,10 +1063,10 @@ static void cpsw_gmii_sel_am3352(struct cpsw_priv *priv,
 		break;
 
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
 		mode = AM33XX_GMII_SEL_MODE_RGMII;
 		break;
 	case PHY_INTERFACE_MODE_RGMII_ID:
-	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_TXID:
 		mode = AM33XX_GMII_SEL_MODE_RGMII;
 		rgmii_id = true;
@@ -1176,23 +1178,53 @@ static int cpsw_eth_probe(struct udevice *dev)
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+static void cpsw_eth_of_parse_slave(struct cpsw_platform_data *data,
+				    int slave_index, ofnode subnode)
+{
+	struct ofnode_phandle_args out_args;
+	struct cpsw_slave_data *slave_data;
+	const char *phy_mode;
+	u32 phy_id[2];
+	int ret;
+
+	slave_data = &data->slave_data[slave_index];
+
+	phy_mode = ofnode_read_string(subnode, "phy-mode");
+	if (phy_mode)
+		slave_data->phy_if = phy_get_interface_by_name(phy_mode);
+
+	ret = ofnode_parse_phandle_with_args(subnode, "phy-handle",
+					     NULL, 0, 0, &out_args);
+	if (!ret) {
+		slave_data->phy_of_handle = out_args.node;
+
+		ret = ofnode_read_s32(slave_data->phy_of_handle, "reg",
+				      &slave_data->phy_addr);
+		if (ret)
+			printf("error: phy addr not found in dt\n");
+	} else {
+		ret = ofnode_read_u32_array(subnode, "phy_id", phy_id, 2);
+		if (ret)
+			printf("error: phy_id read failed\n");
+	}
+
+	slave_data->max_speed = ofnode_read_s32_default(subnode,
+							"max-speed", 0);
+}
+
 static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 {
 	struct eth_pdata *pdata = dev_get_platdata(dev);
 	struct cpsw_platform_data *data;
 	struct gpio_desc *mode_gpios;
-	const char *phy_mode;
-	const void *fdt = gd->fdt_blob;
-	int node = dev_of_offset(dev);
-	int subnode;
 	int slave_index = 0;
-	int active_slave;
 	int num_mode_gpios;
+	ofnode subnode;
 	int ret;
 
 	data = calloc(1, sizeof(struct cpsw_platform_data));
 	pdata->priv_pdata = data;
-	pdata->iobase = devfdt_get_addr(dev);
+	pdata->iobase = dev_read_addr(dev);
 	data->version = CPSW_CTRL_VERSION_2;
 	data->bd_ram_ofs = CPSW_BD_OFFSET;
 	data->ale_reg_ofs = CPSW_ALE_OFFSET;
@@ -1203,36 +1235,37 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 	pdata->phy_interface = -1;
 
 	data->cpsw_base = pdata->iobase;
-	data->channels = fdtdec_get_int(fdt, node, "cpdma_channels", -1);
-	if (data->channels <= 0) {
+
+	ret = dev_read_s32(dev, "cpdma_channels", &data->channels);
+	if (ret) {
 		printf("error: cpdma_channels not found in dt\n");
-		return -ENOENT;
+		return ret;
 	}
 
-	data->slaves = fdtdec_get_int(fdt, node, "slaves", -1);
-	if (data->slaves <= 0) {
+	ret = dev_read_s32(dev, "slaves", &data->slaves);
+	if (ret) {
 		printf("error: slaves not found in dt\n");
-		return -ENOENT;
+		return ret;
 	}
 	data->slave_data = malloc(sizeof(struct cpsw_slave_data) *
 				       data->slaves);
 
-	data->ale_entries = fdtdec_get_int(fdt, node, "ale_entries", -1);
-	if (data->ale_entries <= 0) {
+	ret = dev_read_s32(dev, "ale_entries", &data->ale_entries);
+	if (ret) {
 		printf("error: ale_entries not found in dt\n");
-		return -ENOENT;
+		return ret;
 	}
 
-	data->bd_ram_ofs = fdtdec_get_int(fdt, node, "bd_ram_size", -1);
-	if (data->bd_ram_ofs <= 0) {
+	ret = dev_read_u32(dev, "bd_ram_size", &data->bd_ram_ofs);
+	if (ret) {
 		printf("error: bd_ram_size not found in dt\n");
-		return -ENOENT;
+		return ret;
 	}
 
-	data->mac_control = fdtdec_get_int(fdt, node, "mac_control", -1);
-	if (data->mac_control <= 0) {
+	ret = dev_read_u32(dev, "mac_control", &data->mac_control);
+	if (ret) {
 		printf("error: ale_entries not found in dt\n");
-		return -ENOENT;
+		return ret;
 	}
 
 	num_mode_gpios = gpio_get_list_count(dev, "mode-gpios");
@@ -1244,67 +1277,41 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 		free(mode_gpios);
 	}
 
-	active_slave = fdtdec_get_int(fdt, node, "active_slave", 0);
-	data->active_slave = active_slave;
+	data->active_slave = dev_read_u32_default(dev, "active_slave", 0);
 
-	fdt_for_each_subnode(subnode, fdt, node) {
-		int len;
+	ofnode_for_each_subnode(subnode, dev_ofnode(dev)) {
 		const char *name;
 
-		name = fdt_get_name(fdt, subnode, &len);
+		name = ofnode_get_name(subnode);
 		if (!strncmp(name, "mdio", 4)) {
-			u32 mdio_base;
-
-			mdio_base = cpsw_get_addr_by_node(fdt, subnode);
-			if (mdio_base == FDT_ADDR_T_NONE) {
+			data->mdio_base = ofnode_get_addr(subnode);
+			if (data->mdio_base == FDT_ADDR_T_NONE) {
 				pr_err("Not able to get MDIO address space\n");
 				return -ENOENT;
 			}
-			data->mdio_base = mdio_base;
 		}
 
 		if (!strncmp(name, "slave", 5)) {
-			u32 phy_id[2];
-
 			if (slave_index >= data->slaves)
 				continue;
-			phy_mode = fdt_getprop(fdt, subnode, "phy-mode", NULL);
-			if (phy_mode)
-				data->slave_data[slave_index].phy_if =
-					phy_get_interface_by_name(phy_mode);
-
-			data->slave_data[slave_index].phy_of_handle =
-				fdtdec_lookup_phandle(fdt, subnode,
-						      "phy-handle");
-
-			if (data->slave_data[slave_index].phy_of_handle >= 0) {
-				data->slave_data[slave_index].phy_addr =
-						fdtdec_get_int(gd->fdt_blob,
-						data->slave_data[slave_index].phy_of_handle,
-							       "reg", -1);
-			} else {
-				fdtdec_get_int_array(fdt, subnode, "phy_id",
-						     phy_id, 2);
-				data->slave_data[slave_index].phy_addr =
-						phy_id[1];
-			}
+
+			cpsw_eth_of_parse_slave(data, slave_index, subnode);
 			slave_index++;
 		}
 
 		if (!strncmp(name, "cpsw-phy-sel", 12)) {
-			data->gmii_sel = cpsw_get_addr_by_node(fdt, subnode);
+			data->gmii_sel = ofnode_get_addr(subnode);
 
 			if (data->gmii_sel == FDT_ADDR_T_NONE) {
 				pr_err("Not able to get gmii_sel reg address\n");
 				return -ENOENT;
 			}
 
-			if (fdt_get_property(fdt, subnode, "rmii-clock-ext",
-					     NULL))
+			if (ofnode_read_bool(subnode, "rmii-clock-ext"))
 				data->rmii_clock_external = true;
 
-			data->phy_sel_compat = fdt_getprop(fdt, subnode,
-							   "compatible", NULL);
+			data->phy_sel_compat = ofnode_read_string(subnode,
+								  "compatible");
 			if (!data->phy_sel_compat) {
 				pr_err("Not able to get gmii_sel compatible\n");
 				return -ENOENT;
@@ -1320,15 +1327,16 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 		data->slave_data[1].sliver_reg_ofs = CPSW_SLIVER1_OFFSET;
 	}
 
-	ret = ti_cm_get_macid_addr(dev, active_slave, data);
+	ret = ti_cm_get_macid_addr(dev, data->active_slave, data);
 	if (ret < 0) {
 		pr_err("cpsw read efuse mac failed\n");
 		return ret;
 	}
 
-	pdata->phy_interface = data->slave_data[active_slave].phy_if;
+	pdata->phy_interface = data->slave_data[data->active_slave].phy_if;
 	if (pdata->phy_interface == -1) {
-		debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
+		debug("%s: Invalid PHY interface '%s'\n", __func__,
+		      phy_string_for_interface(pdata->phy_interface));
 		return -EINVAL;
 	}
 

include/cpsw.h

@@ -16,6 +16,8 @@
 #ifndef _CPSW_H_
 #define _CPSW_H_
 
+#include <dm/ofnode.h>
+
 /* reg offset */
 #define CPSW_HOST_PORT_OFFSET	0x108
 #define CPSW_SLAVE0_OFFSET	0x208
@@ -38,7 +40,8 @@ struct cpsw_slave_data {
 	u32		sliver_reg_ofs;
 	int		phy_addr;
 	int		phy_if;
-	int		phy_of_handle;
+	ofnode		phy_of_handle;
+	int		max_speed;
 };
 
 enum {