i.MX6: define bitfields for CHSCCDR register

Signed-off-by: NEric Nelson <eric.nelson@boundarydevices.com>

arch/arm/include/asm/arch-mx6/crm_regs.h

@@ -294,6 +294,10 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK		(0x7)
 #define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET		0
 
+#define CHSCCDR_CLK_SEL_LDB_DI0				3
+#define CHSCCDR_PODF_DIVIDE_BY_3			2
+#define CHSCCDR_IPU_PRE_CLK_540M_PFD			5
+
 /* Define the bits in register CSCDR2 */
 #define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK		(0x3F << 19)
 #define MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET		19