sun50i: A64: add support for R_I2C controller

Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.

Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Tested-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Acked-by: NJagan Teki <jagan@openedev.com>

arch/arm/include/asm/arch-sunxi/gpio.h

@@ -211,6 +211,7 @@ enum sunxi_gpio_number {
 #define SUN8I_H3_GPL_R_TWI	2
 #define SUN8I_A23_GPL_R_TWI	3
 #define SUN8I_GPL_R_UART	2
+#define SUN50I_GPL_R_TWI	2
 
 #define SUN9I_GPN_R_RSB		3
 

arch/arm/mach-sunxi/Kconfig

@@ -278,6 +278,7 @@ config MACH_SUN50I
 	select ARM64
 	select DM_I2C
 	select PHY_SUN4I_USB
+	select SUN6I_PRCM
 	select SUNXI_DE2
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL

board/sunxi/board.c

@@ -168,10 +168,16 @@ void i2c_init_board(void)
 #endif
 
 #ifdef CONFIG_R_I2C_ENABLE
+#ifdef CONFIG_MACH_SUN50I
+	clock_twi_onoff(5, 1);
+	sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI);
+	sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI);
+#else
 	clock_twi_onoff(5, 1);
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
 	sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
 #endif
+#endif
 }
 
 #if defined(CONFIG_ENV_IS_IN_MMC) && defined(CONFIG_ENV_IS_IN_FAT)