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体验新版 GitCode,发现更多精彩内容 >>
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2e2a2a5d
编写于
12月 04, 2018
作者:
T
Tom Rini
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'master' of
git://git.denx.de/u-boot-sh
- DT sync with Linux 4.19 and minor fixes.
上级
d452f27b
04513805
变更
63
展开全部
隐藏空白更改
内联
并排
Showing
63 changed file
with
7174 addition
and
3560 deletion
+7174
-3560
arch/arm/Kconfig
arch/arm/Kconfig
+1
-0
arch/arm/dts/r8a7790-lager.dts
arch/arm/dts/r8a7790-lager.dts
+5
-3
arch/arm/dts/r8a7790.dtsi
arch/arm/dts/r8a7790.dtsi
+93
-8
arch/arm/dts/r8a7791-koelsch.dts
arch/arm/dts/r8a7791-koelsch.dts
+5
-6
arch/arm/dts/r8a7791-porter-u-boot.dts
arch/arm/dts/r8a7791-porter-u-boot.dts
+5
-0
arch/arm/dts/r8a7791-porter.dts
arch/arm/dts/r8a7791-porter.dts
+34
-4
arch/arm/dts/r8a7791.dtsi
arch/arm/dts/r8a7791.dtsi
+48
-3
arch/arm/dts/r8a7792-blanche.dts
arch/arm/dts/r8a7792-blanche.dts
+5
-0
arch/arm/dts/r8a7792.dtsi
arch/arm/dts/r8a7792.dtsi
+18
-1
arch/arm/dts/r8a7793-gose.dts
arch/arm/dts/r8a7793-gose.dts
+5
-6
arch/arm/dts/r8a7793.dtsi
arch/arm/dts/r8a7793.dtsi
+49
-3
arch/arm/dts/r8a7794-alt.dts
arch/arm/dts/r8a7794-alt.dts
+11
-3
arch/arm/dts/r8a7794-silk.dts
arch/arm/dts/r8a7794-silk.dts
+5
-3
arch/arm/dts/r8a7794.dtsi
arch/arm/dts/r8a7794.dtsi
+27
-1
arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
+32
-0
arch/arm/dts/r8a7795-salvator-x-u-boot.dts
arch/arm/dts/r8a7795-salvator-x-u-boot.dts
+28
-0
arch/arm/dts/r8a7795-salvator-x.dts
arch/arm/dts/r8a7795-salvator-x.dts
+47
-1
arch/arm/dts/r8a7795-u-boot.dtsi
arch/arm/dts/r8a7795-u-boot.dtsi
+10
-0
arch/arm/dts/r8a7795.dtsi
arch/arm/dts/r8a7795.dtsi
+1458
-1066
arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
+32
-0
arch/arm/dts/r8a7796-salvator-x-u-boot.dts
arch/arm/dts/r8a7796-salvator-x-u-boot.dts
+28
-0
arch/arm/dts/r8a7796-salvator-x.dts
arch/arm/dts/r8a7796-salvator-x.dts
+29
-1
arch/arm/dts/r8a7796-u-boot.dtsi
arch/arm/dts/r8a7796-u-boot.dtsi
+10
-0
arch/arm/dts/r8a7796.dtsi
arch/arm/dts/r8a7796.dtsi
+1435
-1022
arch/arm/dts/r8a77965-salvator-x-u-boot.dts
arch/arm/dts/r8a77965-salvator-x-u-boot.dts
+31
-0
arch/arm/dts/r8a77965-salvator-x.dts
arch/arm/dts/r8a77965-salvator-x.dts
+28
-0
arch/arm/dts/r8a77965-u-boot.dtsi
arch/arm/dts/r8a77965-u-boot.dtsi
+109
-0
arch/arm/dts/r8a77965.dtsi
arch/arm/dts/r8a77965.dtsi
+1435
-470
arch/arm/dts/r8a77970-eagle-u-boot.dts
arch/arm/dts/r8a77970-eagle-u-boot.dts
+45
-0
arch/arm/dts/r8a77970-eagle.dts
arch/arm/dts/r8a77970-eagle.dts
+113
-28
arch/arm/dts/r8a77970-u-boot.dtsi
arch/arm/dts/r8a77970-u-boot.dtsi
+10
-0
arch/arm/dts/r8a77970.dtsi
arch/arm/dts/r8a77970.dtsi
+466
-199
arch/arm/dts/r8a77990-ebisu-u-boot.dts
arch/arm/dts/r8a77990-ebisu-u-boot.dts
+177
-0
arch/arm/dts/r8a77990-ebisu.dts
arch/arm/dts/r8a77990-ebisu.dts
+18
-167
arch/arm/dts/r8a77990-u-boot.dtsi
arch/arm/dts/r8a77990-u-boot.dtsi
+34
-0
arch/arm/dts/r8a77990.dtsi
arch/arm/dts/r8a77990.dtsi
+156
-77
arch/arm/dts/r8a77995-draak.dts
arch/arm/dts/r8a77995-draak.dts
+129
-1
arch/arm/dts/r8a77995-u-boot.dtsi
arch/arm/dts/r8a77995-u-boot.dtsi
+10
-0
arch/arm/dts/r8a77995.dtsi
arch/arm/dts/r8a77995.dtsi
+595
-389
arch/arm/dts/salvator-common.dtsi
arch/arm/dts/salvator-common.dtsi
+188
-38
arch/arm/dts/salvator-x.dtsi
arch/arm/dts/salvator-x.dtsi
+3
-4
arch/arm/dts/ulcb.dtsi
arch/arm/dts/ulcb.dtsi
+37
-24
arch/arm/mach-rmobile/Kconfig
arch/arm/mach-rmobile/Kconfig
+5
-0
arch/arm/mach-rmobile/cpu_info.c
arch/arm/mach-rmobile/cpu_info.c
+32
-9
board/renesas/salvator-x/salvator-x.c
board/renesas/salvator-x/salvator-x.c
+22
-1
board/renesas/ulcb/ulcb.c
board/renesas/ulcb/ulcb.c
+18
-2
configs/r8a7795_salvator-x_defconfig
configs/r8a7795_salvator-x_defconfig
+2
-0
configs/r8a7795_ulcb_defconfig
configs/r8a7795_ulcb_defconfig
+2
-0
configs/r8a77965_salvator-x_defconfig
configs/r8a77965_salvator-x_defconfig
+2
-0
configs/r8a7796_salvator-x_defconfig
configs/r8a7796_salvator-x_defconfig
+2
-0
configs/r8a7796_ulcb_defconfig
configs/r8a7796_ulcb_defconfig
+2
-0
drivers/mmc/mmc.c
drivers/mmc/mmc.c
+4
-0
include/configs/alt.h
include/configs/alt.h
+1
-2
include/configs/gose.h
include/configs/gose.h
+1
-2
include/configs/koelsch.h
include/configs/koelsch.h
+1
-2
include/configs/lager.h
include/configs/lager.h
+1
-2
include/configs/porter.h
include/configs/porter.h
+1
-2
include/configs/rcar-gen3-common.h
include/configs/rcar-gen3-common.h
+1
-2
include/configs/silk.h
include/configs/silk.h
+1
-2
include/configs/stout.h
include/configs/stout.h
+1
-2
include/dt-bindings/clock/r8a77965-cpg-mssr.h
include/dt-bindings/clock/r8a77965-cpg-mssr.h
+62
-0
include/dt-bindings/clock/r8a77990-cpg-mssr.h
include/dt-bindings/clock/r8a77990-cpg-mssr.h
+2
-3
include/dt-bindings/power/r8a77990-sysc.h
include/dt-bindings/power/r8a77990-sysc.h
+7
-1
未找到文件。
arch/arm/Kconfig
浏览文件 @
2e2a2a5d
...
...
@@ -784,6 +784,7 @@ config ARCH_RMOBILE
imply CMD_DM
imply FAT_WRITE
imply SYS_THUMB_BUILD
imply ARCH_MISC_INIT if DISPLAY_CPUINFO
config TARGET_S32V234EVB
bool "Support s32v234evb"
...
...
arch/arm/dts/r8a7790-lager.dts
浏览文件 @
2e2a2a5d
...
...
@@ -899,9 +899,6 @@
status
=
"okay"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin1ep0
:
endpoint
{
remote
-
endpoint
=
<&
adv7180
>;
bus
-
width
=
<
8
>;
...
...
@@ -926,6 +923,11 @@
};
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
ssi1
{
shared
-
pin
;
};
arch/arm/dts/r8a7790.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -76,12 +76,12 @@
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1300000000>;
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
clock-latency = <300000>; /* 300 us */
power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
next-level-cache = <&L2_CA15>;
capacity-dmips-mhz = <1024>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1400000 1000000>,
...
...
@@ -101,6 +101,16 @@
power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
next-level-cache = <&L2_CA15>;
capacity-dmips-mhz = <1024>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1400000 1000000>,
<1225000 1000000>,
<1050000 1000000>,
< 875000 1000000>,
< 700000 1000000>,
< 350000 1000000>;
};
cpu2: cpu@2 {
...
...
@@ -112,6 +122,16 @@
power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
next-level-cache = <&L2_CA15>;
capacity-dmips-mhz = <1024>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1400000 1000000>,
<1225000 1000000>,
<1050000 1000000>,
< 875000 1000000>,
< 700000 1000000>,
< 350000 1000000>;
};
cpu3: cpu@3 {
...
...
@@ -123,6 +143,16 @@
power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
next-level-cache = <&L2_CA15>;
capacity-dmips-mhz = <1024>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1400000 1000000>,
<1225000 1000000>,
<1050000 1000000>,
< 875000 1000000>,
< 700000 1000000>,
< 350000 1000000>;
};
cpu4: cpu@100 {
...
...
@@ -199,6 +229,24 @@
clock-frequency = <0>;
};
pmu-0 {
compatible = "arm,cortex-a15-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
pmu-1 {
compatible = "arm,cortex-a7-pmu";
interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
...
...
@@ -215,6 +263,16 @@
#size-cells = <2>;
ranges;
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7790-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7790",
"renesas,rcar-gen2-gpio";
...
...
@@ -440,7 +498,7 @@
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
reg = <0 0x10
0
>;
};
};
...
...
@@ -1541,7 +1599,7 @@
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(
4
) | IRQ_TYPE_LEVEL_HIGH)>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(
8
) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
...
...
@@ -1612,6 +1670,33 @@
resets = <&cpg 127>;
};
fdp1@fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 119>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 119>;
};
fdp1@fe944000 {
compatible = "renesas,fdp1";
reg = <0 0xfe944000 0 0x2400>;
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 118>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 118>;
};
fdp1@fe948000 {
compatible = "renesas,fdp1";
reg = <0 0xfe948000 0 0x2400>;
interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 117>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 117>;
};
jpu: jpeg-codec@fe980000 {
compatible = "renesas,jpu-r8a7790",
"renesas,rcar-gen2-jpu";
...
...
@@ -1770,10 +1855,10 @@
timer {
compatible = "arm,armv7-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(
4
) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(
4
) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(
4
) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(
4
) | IRQ_TYPE_LEVEL_LOW)>;
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(
8
) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(
8
) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(
8
) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(
8
) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External USB clock - can be overridden by the board */
...
...
arch/arm/dts/r8a7791-koelsch.dts
浏览文件 @
2e2a2a5d
...
...
@@ -640,6 +640,11 @@
status
=
"okay"
;
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
sata0
{
status
=
"okay"
;
};
...
...
@@ -847,9 +852,6 @@
pinctrl
-
names
=
"default"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin0ep2
:
endpoint
{
remote
-
endpoint
=
<&
adv7612_out
>;
bus
-
width
=
<
24
>;
...
...
@@ -868,9 +870,6 @@
pinctrl
-
names
=
"default"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin1ep
:
endpoint
{
remote
-
endpoint
=
<&
adv7180
>;
bus
-
width
=
<
8
>;
...
...
arch/arm/dts/r8a7791-porter-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -11,3 +11,8 @@
&scif0 {
u-boot,dm-pre-reloc;
};
&i2c6 {
status = "okay";
clock-frequency = <400000>;
};
arch/arm/dts/r8a7791-porter.dts
浏览文件 @
2e2a2a5d
...
...
@@ -374,13 +374,41 @@
&
i2c6
{
status
=
"okay"
;
clock
-
frequency
=
<
400000
>;
clock
-
frequency
=
<
100000
>;
pmic
@
5
a
{
compatible
=
"dlg,da9063l"
;
reg
=
<
0x5a
>;
interrupt
-
parent
=
<&
irqc0
>;
interrupts
=
<
2
IRQ_TYPE_LEVEL_LOW
>;
interrupt
-
controller
;
wdt
{
compatible
=
"dlg,da9063-watchdog"
;
};
};
vdd_dvfs
:
regulator
@
68
{
compatible
=
"dlg,da9210"
;
reg
=
<
0x68
>;
interrupt
-
parent
=
<&
irqc0
>;
interrupts
=
<
2
IRQ_TYPE_LEVEL_LOW
>;
regulator
-
min
-
microvolt
=
<
1000000
>;
regulator
-
max
-
microvolt
=
<
1000000
>;
regulator
-
boot
-
on
;
regulator
-
always
-
on
;
};
};
&
sata0
{
status
=
"okay"
;
};
&
cpu0
{
cpu0
-
supply
=
<&
vdd_dvfs
>;
};
/*
composite
video
input
*/
&
vin0
{
status
=
"okay"
;
...
...
@@ -388,9 +416,6 @@
pinctrl
-
names
=
"default"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin0ep
:
endpoint
{
remote
-
endpoint
=
<&
adv7180
>;
bus
-
width
=
<
8
>;
...
...
@@ -483,6 +508,11 @@
};
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
ssi1
{
shared
-
pin
;
};
arch/arm/dts/r8a7791.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -75,11 +75,11 @@
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1500000000>;
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
clock-latency = <300000>; /* 300 us */
power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
next-level-cache = <&L2_CA15>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1500000 1000000>,
...
...
@@ -98,6 +98,16 @@
clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
next-level-cache = <&L2_CA15>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1500000 1000000>,
<1312500 1000000>,
<1125000 1000000>,
< 937500 1000000>,
< 750000 1000000>,
< 375000 1000000>;
};
L2_CA15: cache-controller-0 {
...
...
@@ -123,6 +133,13 @@
clock-frequency = <0>;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
...
...
@@ -139,6 +156,16 @@
#size-cells = <2>;
ranges;
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7791-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-gpio";
...
...
@@ -404,7 +431,7 @@
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
reg = <0 0x10
0
>;
};
};
...
...
@@ -1618,6 +1645,24 @@
resets = <&cpg 127>;
};
fdp1@fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 119>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 119>;
};
fdp1@fe944000 {
compatible = "renesas,fdp1";
reg = <0 0xfe944000 0 0x2400>;
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 118>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 118>;
};
jpu: jpeg-codec@fe980000 {
compatible = "renesas,jpu-r8a7791",
"renesas,rcar-gen2-jpu";
...
...
arch/arm/dts/r8a7792-blanche.dts
浏览文件 @
2e2a2a5d
...
...
@@ -236,6 +236,11 @@
};
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
scif0
{
pinctrl
-
0
=
<&
scif0_pins
>;
pinctrl
-
names
=
"default"
;
...
...
arch/arm/dts/r8a7792.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -82,6 +82,13 @@
clock-frequency = <0>;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
...
...
@@ -98,6 +105,16 @@
#size-cells = <2>;
ranges;
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7792-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7792",
"renesas,rcar-gen2-gpio";
...
...
@@ -338,7 +355,7 @@
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
reg = <0 0x10
0
>;
};
};
...
...
arch/arm/dts/r8a7793-gose.dts
浏览文件 @
2e2a2a5d
...
...
@@ -596,6 +596,11 @@
status
=
"okay"
;
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
scif0
{
pinctrl
-
0
=
<&
scif0_pins
>;
pinctrl
-
names
=
"default"
;
...
...
@@ -755,9 +760,6 @@
pinctrl
-
names
=
"default"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin0ep2
:
endpoint
{
remote
-
endpoint
=
<&
adv7612_out
>;
bus
-
width
=
<
24
>;
...
...
@@ -777,9 +779,6 @@
status
=
"okay"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin1ep
:
endpoint
{
remote
-
endpoint
=
<&
adv7180_out
>;
bus
-
width
=
<
8
>;
...
...
arch/arm/dts/r8a7793.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -67,10 +67,10 @@
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1500000000>;
voltage-tolerance = <1>; /* 1% */
clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
clock-latency = <300000>; /* 300 us */
power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1500000 1000000>,
...
...
@@ -89,6 +89,17 @@
clock-frequency = <1500000000>;
clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
voltage-tolerance = <1>; /* 1% */
clock-latency = <300000>; /* 300 us */
/* kHz - uV - OPPs unknown yet */
operating-points = <1500000 1000000>,
<1312500 1000000>,
<1125000 1000000>,
< 937500 1000000>,
< 750000 1000000>,
< 375000 1000000>;
next-level-cache = <&L2_CA15>;
};
L2_CA15: cache-controller-0 {
...
...
@@ -107,6 +118,13 @@
clock-frequency = <0>;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
...
...
@@ -123,6 +141,16 @@
#size-cells = <2>;
ranges;
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7793-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
...
...
@@ -389,7 +417,7 @@
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
reg = <0 0x10
0
>;
};
};
...
...
@@ -1287,6 +1315,24 @@
resets = <&cpg 408>;
};
fdp1@fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 119>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 119>;
};
fdp1@fe944000 {
compatible = "renesas,fdp1";
reg = <0 0xfe944000 0 0x2400>;
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 118>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 118>;
};
du: display@feb00000 {
compatible = "renesas,du-r8a7793";
reg = <0 0xfeb00000 0 0x40000>;
...
...
arch/arm/dts/r8a7794-alt.dts
浏览文件 @
2e2a2a5d
...
...
@@ -178,6 +178,12 @@
};
};
};
eeprom
@
50
{
compatible
=
"renesas,r1ex24002"
,
"atmel,24c02"
;
reg
=
<
0x50
>;
pagesize
=
<
16
>;
};
};
/*
...
...
@@ -327,6 +333,11 @@
status
=
"okay"
;
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
sdhi0
{
pinctrl
-
0
=
<&
sdhi0_pins
>;
pinctrl
-
1
=
<&
sdhi0_pins_uhs
>;
...
...
@@ -372,9 +383,6 @@
pinctrl
-
names
=
"default"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin0ep
:
endpoint
{
remote
-
endpoint
=
<&
adv7180
>;
bus
-
width
=
<
8
>;
...
...
arch/arm/dts/r8a7794-silk.dts
浏览文件 @
2e2a2a5d
...
...
@@ -472,9 +472,6 @@
pinctrl
-
names
=
"default"
;
port
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
vin0ep
:
endpoint
{
remote
-
endpoint
=
<&
adv7180
>;
bus
-
width
=
<
8
>;
...
...
@@ -537,6 +534,11 @@
};
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
ssi1
{
shared
-
pin
;
};
arch/arm/dts/r8a7794.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -100,6 +100,13 @@
clock-frequency = <0>;
};
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
/* External SCIF clock */
scif_clk: scif {
compatible = "fixed-clock";
...
...
@@ -116,6 +123,16 @@
#size-cells = <2>;
ranges;
rwdt: watchdog@e6020000 {
compatible = "renesas,r8a7794-wdt",
"renesas,rcar-gen2-wdt";
reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 402>;
status = "disabled";
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7794",
"renesas,rcar-gen2-gpio";
...
...
@@ -345,7 +362,7 @@
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
reg = <0 0x10
0
>;
};
};
...
...
@@ -1320,6 +1337,15 @@
resets = <&cpg 128>;
};
fdp1@fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 119>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 119>;
};
du: display@feb00000 {
compatible = "renesas,du-r8a7794";
reg = <0 0xfeb00000 0 0x40000>;
...
...
arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,35 @@
#include "r8a7795-h3ulcb.dts"
#include "r8a7795-u-boot.dtsi"
/ {
cpld {
compatible = "renesas,ulcb-cpld";
status = "okay";
gpio-sck = <&gpio6 8 0>;
gpio-mosi = <&gpio6 7 0>;
gpio-miso = <&gpio6 10 0>;
gpio-sstbz = <&gpio2 3 0>;
};
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
arch/arm/dts/r8a7795-salvator-x-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,31 @@
#include "r8a7795-salvator-x.dts"
#include "r8a7795-u-boot.dtsi"
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
&sdhi3 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
arch/arm/dts/r8a7795-salvator-x.dts
浏览文件 @
2e2a2a5d
//
SPDX
-
License
-
Identifier
:
GPL
-
2.0
/*
*
Device
Tree
Source
for
the
Salvator
-
X
board
*
Device
Tree
Source
for
the
Salvator
-
X
board
with
R
-
Car
H3
ES2
.0
*
*
Copyright
(
C
)
2015
Renesas
Electronics
Corp
.
*/
...
...
@@ -53,6 +53,12 @@
status
=
"okay"
;
};
&
sound_card
{
dais
=
<&
rsnd_port0
/*
ak4613
*/
&
rsnd_port1
/*
HDMI0
*/
&
rsnd_port2
>;
/*
HDMI1
*/
};
&
hdmi0
{
status
=
"okay"
;
...
...
@@ -63,6 +69,12 @@
remote
-
endpoint
=
<&
hdmi0_con
>;
};
};
port
@
2
{
reg
=
<
2
>;
dw_hdmi0_snd_in
:
endpoint
{
remote
-
endpoint
=
<&
rsnd_endpoint1
>;
};
};
};
};
...
...
@@ -80,6 +92,12 @@
remote
-
endpoint
=
<&
hdmi1_con
>;
};
};
port
@
2
{
reg
=
<
2
>;
dw_hdmi1_snd_in
:
endpoint
{
remote
-
endpoint
=
<&
rsnd_endpoint2
>;
};
};
};
};
...
...
@@ -91,6 +109,34 @@
status
=
"okay"
;
};
&
rcar_sound
{
ports
{
/*
rsnd_port0
is
on
salvator
-
common
*/
rsnd_port1
:
port
@
1
{
rsnd_endpoint1
:
endpoint
{
remote
-
endpoint
=
<&
dw_hdmi0_snd_in
>;
dai
-
format
=
"i2s"
;
bitclock
-
master
=
<&
rsnd_endpoint1
>;
frame
-
master
=
<&
rsnd_endpoint1
>;
playback
=
<&
ssi2
>;
};
};
rsnd_port2
:
port
@
2
{
rsnd_endpoint2
:
endpoint
{
remote
-
endpoint
=
<&
dw_hdmi1_snd_in
>;
dai
-
format
=
"i2s"
;
bitclock
-
master
=
<&
rsnd_endpoint2
>;
frame
-
master
=
<&
rsnd_endpoint2
>;
playback
=
<&
ssi3
>;
};
};
};
};
&
pfc
{
usb2_pins
:
usb2
{
groups
=
"usb2"
;
...
...
arch/arm/dts/r8a7795-u-boot.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -10,3 +10,13 @@
&extalr_clk {
u-boot,dm-pre-reloc;
};
&soc {
rpc: rpc@0xee200000 {
compatible = "renesas,rpc-r8a7795", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
};
arch/arm/dts/r8a7795.dtsi
浏览文件 @
2e2a2a5d
此差异已折叠。
点击以展开。
arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,35 @@
#include "r8a7796-m3ulcb.dts"
#include "r8a7796-u-boot.dtsi"
/ {
cpld {
compatible = "renesas,ulcb-cpld";
status = "okay";
gpio-sck = <&gpio6 8 0>;
gpio-mosi = <&gpio6 7 0>;
gpio-miso = <&gpio6 10 0>;
gpio-sstbz = <&gpio2 3 0>;
};
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
arch/arm/dts/r8a7796-salvator-x-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,31 @@
#include "r8a7796-salvator-x.dts"
#include "r8a7796-u-boot.dtsi"
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
&sdhi3 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
arch/arm/dts/r8a7796-salvator-x.dts
浏览文件 @
2e2a2a5d
//
SPDX
-
License
-
Identifier
:
GPL
-
2.0
/*
*
Device
Tree
Source
for
the
Salvator
-
X
board
*
Device
Tree
Source
for
the
Salvator
-
X
board
with
R
-
Car
M3
-
W
*
*
Copyright
(
C
)
2016
Renesas
Electronics
Corp
.
*/
...
...
@@ -37,6 +37,11 @@
"dclkin.0"
,
"dclkin.1"
,
"dclkin.2"
;
};
&
sound_card
{
dais
=
<&
rsnd_port0
/*
ak4613
*/
&
rsnd_port1
>;
/*
HDMI0
*/
};
&
hdmi0
{
status
=
"okay"
;
...
...
@@ -47,9 +52,32 @@
remote
-
endpoint
=
<&
hdmi0_con
>;
};
};
port
@
2
{
reg
=
<
2
>;
dw_hdmi0_snd_in
:
endpoint
{
remote
-
endpoint
=
<&
rsnd_endpoint1
>;
};
};
};
};
&
hdmi0_con
{
remote
-
endpoint
=
<&
rcar_dw_hdmi0_out
>;
};
&
rcar_sound
{
ports
{
/*
rsnd_port0
is
on
salvator
-
common
*/
rsnd_port1
:
port
@
1
{
rsnd_endpoint1
:
endpoint
{
remote
-
endpoint
=
<&
dw_hdmi0_snd_in
>;
dai
-
format
=
"i2s"
;
bitclock
-
master
=
<&
rsnd_endpoint1
>;
frame
-
master
=
<&
rsnd_endpoint1
>;
playback
=
<&
ssi2
>;
};
};
};
};
arch/arm/dts/r8a7796-u-boot.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -10,3 +10,13 @@
&extalr_clk {
u-boot,dm-pre-reloc;
};
&soc {
rpc: rpc@0xee200000 {
compatible = "renesas,rpc-r8a7796", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
};
arch/arm/dts/r8a7796.dtsi
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此差异已折叠。
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arch/arm/dts/r8a77965-salvator-x-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,34 @@
#include "r8a77965-salvator-x.dts"
#include "r8a77965-u-boot.dtsi"
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;
};
&sdhi2_pins_uhs {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
};
&sdhi0 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
status = "okay";
};
&sdhi2 {
mmc-hs400-1_8v;
max-frequency = <200000000>;
status = "okay";
};
&sdhi3 {
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
status = "okay";
};
arch/arm/dts/r8a77965-salvator-x.dts
浏览文件 @
2e2a2a5d
...
...
@@ -19,3 +19,31 @@
reg
=
<
0x0
0x48000000
0x0
0x78000000
>;
};
};
&
du
{
clocks
=
<&
cpg
CPG_MOD
724
>,
<&
cpg
CPG_MOD
723
>,
<&
cpg
CPG_MOD
721
>,
<&
versaclock5
1
>,
<&
x21_clk
>,
<&
versaclock5
2
>;
clock
-
names
=
"du.0"
,
"du.1"
,
"du.3"
,
"dclkin.0"
,
"dclkin.1"
,
"dclkin.3"
;
};
&
hdmi0
{
status
=
"okay"
;
ports
{
port
@
1
{
reg
=
<
1
>;
rcar_dw_hdmi0_out
:
endpoint
{
remote
-
endpoint
=
<&
hdmi0_con
>;
};
};
};
};
&
hdmi0_con
{
remote
-
endpoint
=
<&
rcar_dw_hdmi0_out
>;
};
arch/arm/dts/r8a77965-u-boot.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -10,3 +10,112 @@
&extalr_clk {
u-boot,dm-pre-reloc;
};
&soc {
rpc: rpc@0xee200000 {
compatible = "renesas,rpc-r8a77965", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 313>;
status = "disabled";
};
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 311>;
status = "disabled";
};
ehci0: usb@ee080100 {
compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
companion= <&ohci0>;
power-domains = <&sysc 32>;
resets = <&cpg 703>;
};
usb2_phy0: usb-phy@ee080200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc 32>;
resets = <&cpg 703>;
#phy-cells = <0>;
};
ehci1: usb@ee0a0100 {
compatible = "generic-ehci";
reg = <0 0xee0a0100 0 0x100>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
companion= <&ohci1>;
power-domains = <&sysc 32>;
resets = <&cpg 702>;
};
usb2_phy1: usb-phy@ee0a0200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
power-domains = <&sysc 32>;
resets = <&cpg 702>;
#phy-cells = <0>;
};
xhci0: usb@ee000000 {
compatible = "renesas,xhci-r8a77965",
"renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc 32>;
resets = <&cpg 328>;
};
};
arch/arm/dts/r8a77965.dtsi
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此差异已折叠。
点击以展开。
arch/arm/dts/r8a77970-eagle-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,48 @@
#include "r8a77970-eagle.dts"
#include "r8a77970-u-boot.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
spi0 = &rpc;
};
};
&avb {
pinctrl-0 = <&avb0_pins>;
pinctrl-names = "default";
};
&phy0 {
reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
};
&pfc {
avb0_pins: avb {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
function = "avb0";
};
};
};
&rpc {
num-cs = <1>;
status = "okay";
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <0>;
flash0: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "s25fs512s", "spi-flash", "jedec,spi-nor";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
reg = <0>;
status = "okay";
};
};
arch/arm/dts/r8a77970-eagle.dts
浏览文件 @
2e2a2a5d
...
...
@@ -8,7 +8,6 @@
/
dts
-
v1
/;
#
include
"r8a77970.dtsi"
#
include
<
dt
-
bindings
/
gpio
/
gpio
.
h
>
/
{
model
=
"Renesas Eagle board based on r8a77970"
;
...
...
@@ -17,7 +16,6 @@
aliases
{
serial0
=
&
scif0
;
ethernet0
=
&
avb
;
spi0
=
&
rpc
;
};
chosen
{
...
...
@@ -30,11 +28,57 @@
/*
first
128
MB
is
reserved
for
secure
area
.
*/
reg
=
<
0x0
0x48000000
0x0
0x38000000
>;
};
hdmi
-
out
{
compatible
=
"hdmi-connector"
;
type
=
"a"
;
port
{
hdmi_con_out
:
endpoint
{
remote
-
endpoint
=
<&
adv7511_out
>;
};
};
};
d3p3
:
regulator
-
fixed
{
compatible
=
"regulator-fixed"
;
regulator
-
name
=
"fixed-3.3V"
;
regulator
-
min
-
microvolt
=
<
3300000
>;
regulator
-
max
-
microvolt
=
<
3300000
>;
regulator
-
boot
-
on
;
regulator
-
always
-
on
;
};
lvds
-
decoder
{
compatible
=
"thine,thc63lvd1024"
;
vcc
-
supply
=
<&
d3p3
>;
ports
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
port
@
0
{
reg
=
<
0
>;
thc63lvd1024_in
:
endpoint
{
remote
-
endpoint
=
<&
lvds0_out
>;
};
};
port
@
2
{
reg
=
<
2
>;
thc63lvd1024_out
:
endpoint
{
remote
-
endpoint
=
<&
adv7511_in
>;
};
};
};
};
};
&
avb
{
pinctrl
-
0
=
<&
avb
0
_pins
>;
pinctrl
-
0
=
<&
avb_pins
>;
pinctrl
-
names
=
"default"
;
renesas
,
no
-
ether
-
link
;
phy
-
handle
=
<&
phy0
>;
phy
-
mode
=
"rgmii-id"
;
...
...
@@ -45,7 +89,16 @@
reg
=
<
0
>;
interrupt
-
parent
=
<&
gpio1
>;
interrupts
=
<
17
IRQ_TYPE_LEVEL_LOW
>;
reset
-
gpios
=
<&
gpio1
16
GPIO_ACTIVE_LOW
>;
};
};
&
canfd
{
pinctrl
-
0
=
<&
canfd0_pins
>;
pinctrl
-
names
=
"default"
;
status
=
"okay"
;
channel0
{
status
=
"okay"
;
};
};
...
...
@@ -70,14 +123,49 @@
gpio
-
controller
;
#
gpio
-
cells
=
<
2
>;
};
hdmi
@
39
{
compatible
=
"adi,adv7511w"
;
reg
=
<
0x39
>;
interrupt
-
parent
=
<&
gpio1
>;
interrupts
=
<
20
IRQ_TYPE_LEVEL_LOW
>;
adi
,
input
-
depth
=
<
8
>;
adi
,
input
-
colorspace
=
"rgb"
;
adi
,
input
-
clock
=
"1x"
;
adi
,
input
-
style
=
<
1
>;
adi
,
input
-
justification
=
"evenly"
;
ports
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
port
@
0
{
reg
=
<
0
>;
adv7511_in
:
endpoint
{
remote
-
endpoint
=
<&
thc63lvd1024_out
>;
};
};
port
@
1
{
reg
=
<
1
>;
adv7511_out
:
endpoint
{
remote
-
endpoint
=
<&
hdmi_con_out
>;
};
};
};
};
};
&
pfc
{
avb0_pins
:
avb
{
mux
{
groups
=
"avb0_link"
,
"avb0_mdio"
,
"avb0_rgmii"
,
"avb0_txcrefclk"
;
function
=
"avb0"
;
};
avb_pins
:
avb0
{
groups
=
"avb0_mdio"
,
"avb0_rgmii"
,
"avb0_txcrefclk"
;
function
=
"avb0"
;
};
canfd0_pins
:
canfd0
{
groups
=
"canfd0_data_a"
;
function
=
"canfd0"
;
};
i2c0_pins
:
i2c0
{
...
...
@@ -91,25 +179,6 @@
};
};
&
rpc
{
num
-
cs
=
<
1
>;
status
=
"okay"
;
spi
-
max
-
frequency
=
<
50000000
>;
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
0
>;
flash0
:
spi
-
flash
@
0
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
1
>;
compatible
=
"s25fs512s"
,
"spi-flash"
,
"jedec,spi-nor"
;
spi
-
max
-
frequency
=
<
50000000
>;
spi
-
tx
-
bus
-
width
=
<
1
>;
spi
-
rx
-
bus
-
width
=
<
1
>;
reg
=
<
0
>;
status
=
"okay"
;
};
};
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
...
...
@@ -121,3 +190,19 @@
status
=
"okay"
;
};
&
du
{
status
=
"okay"
;
};
&
lvds0
{
status
=
"okay"
;
ports
{
port
@
1
{
lvds0_out
:
endpoint
{
remote
-
endpoint
=
<&
thc63lvd1024_in
>;
};
};
};
};
arch/arm/dts/r8a77970-u-boot.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -10,3 +10,13 @@
&extalr_clk {
u-boot,dm-pre-reloc;
};
&soc {
rpc: rpc@0xee200000 {
compatible = "renesas,rpc-r8a77970", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
};
arch/arm/dts/r8a77970.dtsi
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此差异已折叠。
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arch/arm/dts/r8a77990-ebisu-u-boot.dts
浏览文件 @
2e2a2a5d
...
...
@@ -7,3 +7,180 @@
#include "r8a77990-ebisu.dts"
#include "r8a77990-u-boot.dtsi"
/ {
reg_1p8v: regulator0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
vcc_sdhi1: regulator-vcc-sdhi1 {
compatible = "regulator-fixed";
regulator-name = "SDHI1 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vccq_sdhi1: regulator-vccq-sdhi1 {
compatible = "regulator-gpio";
regulator-name = "SDHI1 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
scif_clk_pins: scif_clk {
groups = "scif_clk_a";
function = "scif_clk";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
power-source = <3300>;
};
sdhi1_pins_uhs: sd1_uhs {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
power-source = <1800>;
};
sdhi3_pins: sd2 {
groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
function = "sdhi3";
power-source = <1800>;
};
sdhi3_pins_uhs: sd2_uhs {
groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
function = "sdhi3";
power-source = <1800>;
};
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
/* full size SD */
pinctrl-0 = <&sdhi0_pins>;
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
max-frequency = <208000000>;
};
&sdhi1 {
/* microSD */
pinctrl-0 = <&sdhi1_pins>;
pinctrl-1 = <&sdhi1_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi1>;
vqmmc-supply = <&vccq_sdhi1>;
cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
max-frequency = <208000000>;
};
&sdhi3 {
/* used for on-board 8bit eMMC */
pinctrl-0 = <&sdhi3_pins>;
pinctrl-1 = <&sdhi3_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <®_3p3v>;
vqmmc-supply = <®_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
non-removable;
status = "okay";
};
arch/arm/dts/r8a77990-ebisu.dts
浏览文件 @
2e2a2a5d
...
...
@@ -28,72 +28,6 @@
/*
first
128
MB
is
reserved
for
secure
area
.
*/
reg
=
<
0x0
0x48000000
0x0
0x38000000
>;
};
reg_1p8v
:
regulator0
{
compatible
=
"regulator-fixed"
;
regulator
-
name
=
"fixed-1.8V"
;
regulator
-
min
-
microvolt
=
<
1800000
>;
regulator
-
max
-
microvolt
=
<
1800000
>;
regulator
-
boot
-
on
;
regulator
-
always
-
on
;
};
reg_3p3v
:
regulator1
{
compatible
=
"regulator-fixed"
;
regulator
-
name
=
"fixed-3.3V"
;
regulator
-
min
-
microvolt
=
<
3300000
>;
regulator
-
max
-
microvolt
=
<
3300000
>;
regulator
-
boot
-
on
;
regulator
-
always
-
on
;
};
vcc_sdhi0
:
regulator
-
vcc
-
sdhi0
{
compatible
=
"regulator-fixed"
;
regulator
-
name
=
"SDHI0 Vcc"
;
regulator
-
min
-
microvolt
=
<
3300000
>;
regulator
-
max
-
microvolt
=
<
3300000
>;
gpio
=
<&
gpio5
17
GPIO_ACTIVE_HIGH
>;
enable
-
active
-
high
;
};
vccq_sdhi0
:
regulator
-
vccq
-
sdhi0
{
compatible
=
"regulator-gpio"
;
regulator
-
name
=
"SDHI0 VccQ"
;
regulator
-
min
-
microvolt
=
<
1800000
>;
regulator
-
max
-
microvolt
=
<
3300000
>;
gpios
=
<&
gpio5
18
GPIO_ACTIVE_HIGH
>;
gpios
-
states
=
<
1
>;
states
=
<
3300000
1
1800000
0
>;
};
vcc_sdhi1
:
regulator
-
vcc
-
sdhi1
{
compatible
=
"regulator-fixed"
;
regulator
-
name
=
"SDHI1 Vcc"
;
regulator
-
min
-
microvolt
=
<
3300000
>;
regulator
-
max
-
microvolt
=
<
3300000
>;
gpio
=
<&
gpio0
4
GPIO_ACTIVE_HIGH
>;
enable
-
active
-
high
;
};
vccq_sdhi1
:
regulator
-
vccq
-
sdhi1
{
compatible
=
"regulator-gpio"
;
regulator
-
name
=
"SDHI1 VccQ"
;
regulator
-
min
-
microvolt
=
<
1800000
>;
regulator
-
max
-
microvolt
=
<
3300000
>;
gpios
=
<&
gpio3
15
GPIO_ACTIVE_HIGH
>;
gpios
-
states
=
<
1
>;
states
=
<
3300000
1
1800000
0
>;
};
};
&
avb
{
...
...
@@ -121,10 +55,11 @@
clock
-
frequency
=
<
48000000
>;
};
&
pfc
{
pinctrl
-
0
=
<&
scif_clk_pins
>
;
pinctrl
-
names
=
"default"
;
&
ohci0
{
status
=
"okay"
;
}
;
&
pfc
{
avb_pins
:
avb
{
mux
{
groups
=
"avb_link"
,
"avb_mii"
;
...
...
@@ -132,119 +67,35 @@
};
};
scif2_pins
:
scif2
{
groups
=
"scif2_data_a"
;
function
=
"scif2"
;
};
scif_clk_pins
:
scif_clk
{
groups
=
"scif_clk_a"
;
function
=
"scif_clk"
;
};
sdhi0_pins
:
sd0
{
groups
=
"sdhi0_data4"
,
"sdhi0_ctrl"
;
function
=
"sdhi0"
;
power
-
source
=
<
3300
>;
};
sdhi0_pins_uhs
:
sd0_uhs
{
groups
=
"sdhi0_data4"
,
"sdhi0_ctrl"
;
function
=
"sdhi0"
;
power
-
source
=
<
1800
>;
};
sdhi1_pins
:
sd1
{
groups
=
"sdhi1_data4"
,
"sdhi1_ctrl"
;
function
=
"sdhi1"
;
power
-
source
=
<
3300
>;
};
sdhi1_pins_uhs
:
sd1_uhs
{
groups
=
"sdhi1_data4"
,
"sdhi1_ctrl"
;
function
=
"sdhi1"
;
power
-
source
=
<
1800
>;
};
sdhi3_pins
:
sd2
{
groups
=
"sdhi3_data8"
,
"sdhi3_ctrl"
,
"sdhi3_ds"
;
function
=
"sdhi3"
;
power
-
source
=
<
1800
>;
};
sdhi3_pins_uhs
:
sd2_uhs
{
groups
=
"sdhi3_data8"
,
"sdhi3_ctrl"
,
"sdhi3_ds"
;
function
=
"sdhi3"
;
power
-
source
=
<
1800
>;
usb0_pins
:
usb
{
groups
=
"usb0_b"
;
function
=
"usb0"
;
};
usb
0_pins
:
usb
0
{
groups
=
"usb0"
;
function
=
"usb0"
;
usb
30_pins
:
usb3
0
{
groups
=
"usb
3
0"
;
function
=
"usb
3
0"
;
};
};
&
usb2_phy0
{
pinctrl
-
0
=
<&
usb0_pins
>;
pinctrl
-
name
=
"default"
;
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
&
sdhi0
{
/*
full
size
SD
*/
pinctrl
-
0
=
<&
sdhi0_pins
>;
pinctrl
-
1
=
<&
sdhi0_pins_uhs
>;
pinctrl
-
names
=
"default"
,
"state_uhs"
;
vmmc
-
supply
=
<&
vcc_sdhi0
>;
vqmmc
-
supply
=
<&
vccq_sdhi0
>;
cd
-
gpios
=
<&
gpio3
12
GPIO_ACTIVE_LOW
>;
wp
-
gpios
=
<&
gpio3
13
GPIO_ACTIVE_HIGH
>;
bus
-
width
=
<
4
>;
sd
-
uhs
-
sdr12
;
sd
-
uhs
-
sdr25
;
sd
-
uhs
-
sdr50
;
sd
-
uhs
-
sdr104
;
&
scif2
{
status
=
"okay"
;
max
-
frequency
=
<
208000000
>;
};
&
sdhi1
{
/*
microSD
*/
pinctrl
-
0
=
<&
sdhi1_pins
>;
pinctrl
-
1
=
<&
sdhi1_pins_uhs
>;
pinctrl
-
names
=
"default"
,
"state_uhs"
;
vmmc
-
supply
=
<&
vcc_sdhi1
>;
vqmmc
-
supply
=
<&
vccq_sdhi1
>;
cd
-
gpios
=
<&
gpio3
14
GPIO_ACTIVE_LOW
>;
bus
-
width
=
<
4
>;
sd
-
uhs
-
sdr12
;
sd
-
uhs
-
sdr25
;
sd
-
uhs
-
sdr50
;
sd
-
uhs
-
sdr104
;
status
=
"okay"
;
max
-
frequency
=
<
208000000
>;
};
&
usb2_phy0
{
pinctrl
-
0
=
<&
usb0_pins
>;
pinctrl
-
names
=
"default"
;
&
sdhi3
{
/*
used
for
on
-
board
8
bit
eMMC
*/
pinctrl
-
0
=
<&
sdhi3_pins
>;
pinctrl
-
1
=
<&
sdhi3_pins_uhs
>;
pinctrl
-
names
=
"default"
,
"state_uhs"
;
vmmc
-
supply
=
<&
reg_3p3v
>;
vqmmc
-
supply
=
<&
reg_1p8v
>;
bus
-
width
=
<
8
>;
mmc
-
hs200
-
1
_8v
;
mmc
-
hs400
-
1
_8v
;
non
-
removable
;
status
=
"okay"
;
};
&
scif2
{
pinctrl
-
0
=
<&
scif2
_pins
>;
&
xhci0
{
pinctrl
-
0
=
<&
usb30
_pins
>;
pinctrl
-
names
=
"default"
;
status
=
"okay"
;
...
...
arch/arm/dts/r8a77990-u-boot.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -6,3 +6,37 @@
*/
#include "r8a779x-u-boot.dtsi"
&soc {
rpc: rpc@0xee200000 {
compatible = "renesas,rpc-r8a77990", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77990";
reg = <0 0xee100000 0 0x2000>;
clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>;
status = "disabled";
};
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a77990";
reg = <0 0xee120000 0 0x2000>;
clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>;
status = "disabled";
};
sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a77990";
reg = <0 0xee160000 0 0x2000>;
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
status = "disabled";
};
};
arch/arm/dts/r8a77990.dtsi
浏览文件 @
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arch/arm/dts/r8a77995-draak.dts
浏览文件 @
2e2a2a5d
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arch/arm/dts/r8a77995-u-boot.dtsi
浏览文件 @
2e2a2a5d
...
...
@@ -6,3 +6,13 @@
*/
#include "r8a779x-u-boot.dtsi"
&soc {
rpc: rpc@0xee200000 {
compatible = "renesas,rpc-r8a77995", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
};
arch/arm/dts/r8a77995.dtsi
浏览文件 @
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arch/arm/dts/salvator-common.dtsi
浏览文件 @
2e2a2a5d
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arch/arm/dts/salvator-x.dtsi
浏览文件 @
2e2a2a5d
//
SPDX
-
License
-
Identifier
:
GPL
-
2.0
/*
*
Device
Tree
Source
for
the
Salvator
-
X
board
*
*
Copyright
(
C
)
2015
-
2016
Renesas
Electronics
Corp
.
*
*
This
file
is
licensed
under
the
terms
of
the
GNU
General
Public
License
*
version
2.
This
program
is
licensed
"as is"
without
any
warranty
of
any
*
kind
,
whether
express
or
implied
.
*/
#
include
"salvator-common.dtsi"
...
...
@@ -20,6 +17,8 @@
};
&
i2c4
{
clock
-
frequency
=
<
400000
>;
versaclock5
:
clock
-
generator
@
6
a
{
compatible
=
"idt,5p49v5923"
;
reg
=
<
0x6a
>;
...
...
arch/arm/dts/ulcb.dtsi
浏览文件 @
2e2a2a5d
//
SPDX
-
License
-
Identifier
:
GPL
-
2.0
/*
*
Device
Tree
Source
for
the
R
-
Car
Gen3
ULCB
board
*
*
Copyright
(
C
)
2016
Renesas
Electronics
Corp
.
*
Copyright
(
C
)
2016
Cogent
Embedded
,
Inc
.
*
*
This
file
is
licensed
under
the
terms
of
the
GNU
General
Public
License
*
version
2.
This
program
is
licensed
"as is"
without
any
warranty
of
any
*
kind
,
whether
express
or
implied
.
*/
#
include
<
dt
-
bindings
/
gpio
/
gpio
.
h
>
...
...
@@ -24,15 +21,6 @@
stdout
-
path
=
"serial0:115200n8"
;
};
cpld
{
compatible
=
"renesas,ulcb-cpld"
;
status
=
"okay"
;
gpio
-
sck
=
<&
gpio6
8
0
>;
gpio
-
mosi
=
<&
gpio6
7
0
>;
gpio
-
miso
=
<&
gpio6
10
0
>;
gpio
-
sstbz
=
<&
gpio2
3
0
>;
};
audio_clkout
:
audio
-
clkout
{
/*
*
This
is
same
as
<&
rcar_sound
0
>
...
...
@@ -252,6 +240,32 @@
&
i2c_dvfs
{
status
=
"okay"
;
pmic
:
pmic
@
30
{
pinctrl
-
0
=
<&
irq0_pins
>;
pinctrl
-
names
=
"default"
;
compatible
=
"rohm,bd9571mwv"
;
reg
=
<
0x30
>;
interrupt
-
parent
=
<&
intc_ex
>;
interrupts
=
<
0
IRQ_TYPE_LEVEL_LOW
>;
interrupt
-
controller
;
#
interrupt
-
cells
=
<
2
>;
gpio
-
controller
;
#
gpio
-
cells
=
<
2
>;
rohm
,
ddr
-
backup
-
power
=
<
0xf
>;
rohm
,
rstbmode
-
pulse
;
regulators
{
dvfs
:
dvfs
{
regulator
-
name
=
"dvfs"
;
regulator
-
min
-
microvolt
=
<
750000
>;
regulator
-
max
-
microvolt
=
<
1030000
>;
regulator
-
boot
-
on
;
regulator
-
always
-
on
;
};
};
};
};
&
ohci1
{
...
...
@@ -264,12 +278,12 @@
avb_pins
:
avb
{
mux
{
groups
=
"avb_link"
,
"avb_md
c
"
,
"avb_mii"
;
groups
=
"avb_link"
,
"avb_md
io
"
,
"avb_mii"
;
function
=
"avb"
;
};
pins_md
c
{
groups
=
"avb_md
c
"
;
pins_md
io
{
groups
=
"avb_md
io
"
;
drive
-
strength
=
<
24
>;
};
...
...
@@ -285,6 +299,11 @@
function
=
"i2c2"
;
};
irq0_pins
:
irq0
{
groups
=
"intc_ex_irq0"
;
function
=
"intc_ex"
;
};
scif2_pins
:
scif2
{
groups
=
"scif2_data_a"
;
function
=
"scif2"
;
...
...
@@ -310,7 +329,7 @@
sdhi2_pins
:
sd2
{
groups
=
"sdhi2_data8"
,
"sdhi2_ctrl"
,
"sdhi2_ds"
;
function
=
"sdhi2"
;
power
-
source
=
<
18
00
>;
power
-
source
=
<
33
00
>;
};
sdhi2_pins_uhs
:
sd2_uhs
{
...
...
@@ -396,12 +415,8 @@
vqmmc
-
supply
=
<&
vccq_sdhi0
>;
cd
-
gpios
=
<&
gpio3
12
GPIO_ACTIVE_LOW
>;
bus
-
width
=
<
4
>;
sd
-
uhs
-
sdr12
;
sd
-
uhs
-
sdr25
;
sd
-
uhs
-
sdr50
;
sd
-
uhs
-
sdr104
;
status
=
"okay"
;
max
-
frequency
=
<
208000000
>;
};
&
sdhi2
{
...
...
@@ -414,10 +429,8 @@
vqmmc
-
supply
=
<&
reg_1p8v
>;
bus
-
width
=
<
8
>;
mmc
-
hs200
-
1
_8v
;
mmc
-
hs400
-
1
_8v
;
non
-
removable
;
status
=
"okay"
;
max
-
frequency
=
<
200000000
>;
};
&
ssi1
{
...
...
@@ -431,7 +444,7 @@
status
=
"okay"
;
};
&
wdt0
{
&
rwdt
{
timeout
-
sec
=
<
60
>;
status
=
"okay"
;
};
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board/renesas/salvator-x/salvator-x.c
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configs/r8a7795_salvator-x_defconfig
浏览文件 @
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...
...
@@ -28,6 +28,8 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x-u-boot"
CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot"
CONFIG_MULTI_DTB_FIT=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
...
...
configs/r8a7795_ulcb_defconfig
浏览文件 @
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