ARM: UniPhier: enable output of system bus

For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs,
the output of the system bus is disabled by default.
It must be enabled by software to have access to the system bus.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c

@@ -12,6 +12,13 @@
 
 void sbc_init(void)
 {
+	u32 tmp;
+
+	/* system bus output enable */
+	tmp = readl(PC0CTRL);
+	tmp &= 0xfffffcff;
+	writel(tmp, PC0CTRL);
+
 	/* XECS1: sub/boot memory (boot swap = off/on) */
 	writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
 	writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);

arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c

@@ -12,6 +12,13 @@
 
 void sbc_init(void)
 {
+	u32 tmp;
+
+	/* system bus output enable */
+	tmp = readl(PC0CTRL);
+	tmp &= 0xfffffcff;
+	writel(tmp, PC0CTRL);
+
 #if !defined(CONFIG_SPL_BUILD)
 	/* XECS0 : dummy */
 	writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);

arch/arm/include/asm/arch-uniphier/sbc-regs.h

@@ -95,6 +95,7 @@
 #define SBCTRL1_ADMULTIPLX_MEM_VALUE	0x03005500
 #define SBCTRL2_ADMULTIPLX_MEM_VALUE	0x14000010
 
+#define PC0CTRL				0x598000c0
 #define ROM_BOOT_ROMRSV2		0x59801208
 
 #ifndef __ASSEMBLY__