dra7xx_evm: add SPL API, QSPI, and serial flash support

Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: NMatt Porter <matt.porter@linaro.org>
Signed-off-by: NSourav Poddar <sourav.poddar@ti.com>
Reviewed-by: NJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

board/ti/dra7xx/mux_data.h

@@ -51,5 +51,15 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
 	{RGMII0_RXD2, (IEN | M0) },
 	{RGMII0_RXD1, (IEN | M0) },
 	{RGMII0_RXD0, (IEN | M0) },
+	{GPMC_A13, (IEN | PDIS | M1)},  /* QSPI1_RTCLK */
+	{GPMC_A14, (IEN | PDIS | M1)},  /* QSPI1_D[3] */
+	{GPMC_A15, (IEN | PDIS | M1)},  /* QSPI1_D[2] */
+	{GPMC_A16, (IEN | PDIS | M1)},  /* QSPI1_D[1] */
+	{GPMC_A17, (IEN | PDIS | M1)},  /* QSPI1_D[0] */
+	{GPMC_A18, (M1)},  /* QSPI1_SCLK */
+	{GPMC_A3, (IEN | PDIS | M1)},   /* QSPI1_CS2 */
+	{GPMC_A4, (IEN | PDIS | M1)},   /* QSPI1_CS3 */
+	{GPMC_CS2, (IEN | PTU | PDIS | M1)},    /* QSPI1_CS0 */
+	{GPMC_CS3, (IEN | PTU | PDIS | M1)},    /* QSPI1_CS1*/
 };
 #endif /* _MUX_DATA_DRA7XX_H_ */

include/configs/dra7xx_evm.h

@@ -48,4 +48,23 @@
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR			2
 
+/* SPI */
+#undef	CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_TI_SPI_MMAP
+#define CONFIG_SF_DEFAULT_SPEED                48000000
+#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS             0
+#define CONFIG_SPL_SPI_CS              0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
+
 #endif /* __CONFIG_DRA7XX_EVM_H */