x86: baytrail: Introduce ACPI global NVS

This introduces baytrail-specific ACPI global NVS structure, defined in
both C header file and ASL file.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NGeorge McCollister <george.mccollister@gmail.com>
Tested-by: NGeorge McCollister <george.mccollister@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

arch/x86/cpu/baytrail/acpi.c

@@ -5,10 +5,14 @@
  */
 
 #include <common.h>
+#include <cpu.h>
+#include <dm.h>
+#include <dm/uclass-internal.h>
 #include <asm/acpi_table.h>
 #include <asm/ioapic.h>
 #include <asm/mpspec.h>
 #include <asm/tables.h>
+#include <asm/arch/global_nvs.h>
 #include <asm/arch/iomap.h>
 
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
@@ -161,3 +165,25 @@ u32 acpi_fill_madt(u32 current)
 
 	return current;
 }
+
+void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
+{
+	struct udevice *dev;
+	int ret;
+
+	/* at least we have one processor */
+	gnvs->pcnt = 1;
+	/* override the processor count with actual number */
+	ret = uclass_find_first_device(UCLASS_CPU, &dev);
+	if (ret == 0 && dev != NULL) {
+		ret = cpu_get_count(dev);
+		if (ret > 0)
+			gnvs->pcnt = ret;
+	}
+
+	/* determine whether internal uart is on */
+	if (IS_ENABLED(CONFIG_INTERNAL_UART))
+		gnvs->iuart_en = 1;
+	else
+		gnvs->iuart_en = 0;
+}

arch/x86/include/asm/acpi/global_nvs.h

+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ACPI_GNVS_H_
+#define _ACPI_GNVS_H_
+
+/*
+ * This file provides two ACPI global NVS macros: ACPI_GNVS_ADDR and
+ * ACPI_GNVS_SIZE. They are to be used in platform's global_nvs.asl file
+ * to declare the GNVS OperationRegion, as well as write_acpi_tables()
+ * for the GNVS address runtime fix up.
+ */
+#define ACPI_GNVS_ADDR	0xdeadbeef
+#define ACPI_GNVS_SIZE	0x100
+
+#endif /* _ACPI_GNVS_H_ */

arch/x86/include/asm/arch-baytrail/acpi/global_nvs.asl

+/*
+ * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/acpi/global_nvs.h>
+
+OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE)
+Field(GNVS, ByteAcc, NoLock, Preserve)
+{
+	Offset (0x00),
+	PCNT, 8,	/* processor count */
+	IURE, 8,	/* internal UART enabled */
+}

arch/x86/include/asm/arch-baytrail/global_nvs.h

+/*
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _GLOBAL_NVS_H_
+#define _GLOBAL_NVS_H_
+
+struct __packed acpi_global_nvs {
+	u8	pcnt;		/* processor count */
+	u8	iuart_en;	/* internal UART enabled */
+
+	/*
+	 * Add padding so sizeof(struct acpi_global_nvs) == 0x100.
+	 * This must match the size defined in the global_nvs.asl.
+	 */
+	u8	rsvd[254];
+};
+
+#endif /* _GLOBAL_NVS_H_ */