Enable CONFIG_NET_MULTI on all remaining PPC4xx boards

All in-tree PPC4xx boards now use CONFIG_NET_MULTI
Signed-off-by: NBen Warren <biggerbadderben@gmail.com>
Signed-off-by: NStefan Roese <sr@denx.de>

include/configs/AR405.h

@@ -71,6 +71,7 @@
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/CPCIISER4.h

@@ -54,6 +54,7 @@
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/CRAYL1.h

@@ -45,6 +45,7 @@
 #define	CONFIG_PHY_ADDR		1	/* PHY address; handling of ENET */
 #define CONFIG_BOARD_EARLY_INIT_F 1	/* early setup for 405gp */
 #define CONFIG_MISC_INIT_R	1	/* so that a misc_init_r() is called */
+#define CONFIG_NET_MULTI
 
 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
  * keep possible initrd ramdisk decompression out.  This is in k (1024 bytes)

include/configs/ERIC.h

@@ -96,6 +96,7 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/EXBITGEN.h

@@ -81,6 +81,7 @@
 
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/HUB405.h

@@ -60,6 +60,7 @@
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
 
 #define CONFIG_PHY_CLK_FREQ	EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/JSE.h

@@ -135,6 +135,7 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/MIP405.h

@@ -341,6 +341,7 @@
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
 #define CONFIG_PHY_RESET_DELAY	300	/* Intel LXT971A needs this */
 #define CONFIG_PHY_CMD_DELAY	40	/* Intel LXT971A needs this */
+#define CONFIG_NET_MULTI
 /************************************************************
  * RTC
  ***********************************************************/

include/configs/OCRTC.h

@@ -54,6 +54,7 @@
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/ORSG.h

@@ -54,6 +54,7 @@
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
 
 
 /*

include/configs/PIP405.h

@@ -281,6 +281,7 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
+#define CONFIG_NET_MULTI
 /************************************************************
  * RTC
  ***********************************************************/

include/configs/W7OLMC.h

@@ -68,6 +68,7 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1		/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0		/* PHY address			*/
+#define CONFIG_NET_MULTI
 
 #define CONFIG_RTC_M48T35A	1		/* ST Electronics M48 timekeeper */
 

include/configs/W7OLMG.h

@@ -68,6 +68,7 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1		/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0		/* PHY address			*/
+#define CONFIG_NET_MULTI
 
 #define CONFIG_RTC_M48T35A	1		/* ST Electronics M48 timekeeper */
 #define CONFIG_DTT_LM75     1                /* ON Semi's LM75 */

include/configs/WUH405.h

@@ -58,6 +58,7 @@
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
 
 #define CONFIG_PHY_CLK_FREQ	EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
 

include/configs/csb272.h

@@ -184,6 +184,7 @@
 #define CONFIG_PHY_CMD_DELAY	40	/* PHY COMMAND delay		*/
 					/* 32usec min. for LXT971A	*/
 #define CONFIG_PHY_RESET_DELAY	300	/* PHY RESET recovery delay	*/
+#define CONFIG_NET_MULTI
 
 /*
  * RTC configuration

include/configs/csb472.h

@@ -183,6 +183,7 @@
 #define CONFIG_PHY_CMD_DELAY	40	/* PHY COMMAND delay		*/
 					/* 32usec min. for LXT971A	*/
 #define CONFIG_PHY_RESET_DELAY	300	/* PHY RESET recovery delay	*/
+#define CONFIG_NET_MULTI
 
 /*
  * RTC configuration

include/configs/netstal-common.h

@@ -61,8 +61,8 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII			/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
-#if defined(CONFIG_440)
 #define CONFIG_NET_MULTI	1
+#if defined(CONFIG_440)
 #define CONFIG_NETCONSOLE		/* include NetConsole support	*/
 #define CONFIG_SYS_RX_ETH_BUFFER	32	/* number of eth rx buffers	*/
 #else

include/configs/sbc405.h

@@ -62,6 +62,7 @@
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_PHY_RESET_DELAY	300	/* Intel LXT971A needs this	*/
+#define CONFIG_NET_MULTI
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"bootargs=emac(0,0)host:/T221ppc/target/config/sbc405/vxWorks.st " \