nand: increase chip_delay in mv kirkwood nand driver
The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay. The Data Transfer from Cell to Register is >= 35us. Other Vendors and older chips normally use >= 25us. To have enough margin 40us is selected. Signed-off-by: NStefan Bigler <stefan.bigler@keymile.com> Signed-off-by: NHolger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Stefan Roese <sr@denx.de> Signed-off-by: NScott Wood <scottwood@freescale.com>
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