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体验新版 GitCode,发现更多精彩内容 >>
提交
086ebcd4
编写于
1月 17, 2018
作者:
T
Tom Rini
浏览文件
操作
浏览文件
下载
差异文件
Merge
git://git.denx.de/u-boot-fsl-qoriq
上级
3759df0c
2eb2dbd4
变更
30
隐藏空白更改
内联
并排
Showing
30 changed file
with
439 addition
and
114 deletion
+439
-114
arch/arm/Kconfig
arch/arm/Kconfig
+12
-0
arch/arm/cpu/armv8/Kconfig
arch/arm/cpu/armv8/Kconfig
+3
-2
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+2
-2
arch/arm/dts/Makefile
arch/arm/dts/Makefile
+1
-0
arch/arm/dts/fsl-ls1012a-2g5rdb.dts
arch/arm/dts/fsl-ls1012a-2g5rdb.dts
+43
-0
board/freescale/common/Kconfig
board/freescale/common/Kconfig
+2
-0
board/freescale/common/cmd_esbc_validate.c
board/freescale/common/cmd_esbc_validate.c
+2
-0
board/freescale/common/qixis.c
board/freescale/common/qixis.c
+7
-7
board/freescale/ls1012ardb/Kconfig
board/freescale/ls1012ardb/Kconfig
+18
-0
board/freescale/ls1012ardb/MAINTAINERS
board/freescale/ls1012ardb/MAINTAINERS
+7
-0
board/freescale/ls1012ardb/README
board/freescale/ls1012ardb/README
+43
-0
board/freescale/ls1012ardb/ls1012ardb.c
board/freescale/ls1012ardb/ls1012ardb.c
+6
-1
board/freescale/ls1021atwr/ls1021atwr.c
board/freescale/ls1021atwr/ls1021atwr.c
+45
-46
board/freescale/ls2080ardb/ls2080ardb.c
board/freescale/ls2080ardb/ls2080ardb.c
+2
-2
board/freescale/p1010rdb/p1010rdb.c
board/freescale/p1010rdb/p1010rdb.c
+2
-0
configs/ls1012a2g5rdb_qspi_defconfig
configs/ls1012a2g5rdb_qspi_defconfig
+40
-0
configs/ls1088aqds_sdcard_qspi_defconfig
configs/ls1088aqds_sdcard_qspi_defconfig
+12
-0
configs/ls1088ardb_sdcard_qspi_defconfig
configs/ls1088ardb_sdcard_qspi_defconfig
+12
-0
drivers/serial/serial_lpuart.c
drivers/serial/serial_lpuart.c
+7
-11
env/sf.c
env/sf.c
+21
-0
include/configs/ls1012a2g5rdb.h
include/configs/ls1012a2g5rdb.h
+122
-0
include/configs/ls1012a_common.h
include/configs/ls1012a_common.h
+11
-0
include/configs/ls1012aqds.h
include/configs/ls1012aqds.h
+0
-10
include/configs/ls1012ardb.h
include/configs/ls1012ardb.h
+0
-9
include/configs/ls1046a_common.h
include/configs/ls1046a_common.h
+13
-0
include/configs/ls1046aqds.h
include/configs/ls1046aqds.h
+0
-10
include/configs/ls1046ardb.h
include/configs/ls1046ardb.h
+0
-12
include/configs/ls1088a_common.h
include/configs/ls1088a_common.h
+6
-0
include/configs/ls1088aqds.h
include/configs/ls1088aqds.h
+0
-1
include/configs/ls1088ardb.h
include/configs/ls1088ardb.h
+0
-1
未找到文件。
arch/arm/Kconfig
浏览文件 @
086ebcd4
...
...
@@ -968,6 +968,18 @@ config TARGET_LS1012ARDB
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
config TARGET_LS1012A2G5RDB
bool "Support ls1012a2g5rdb"
select ARCH_LS1012A
select ARM64
select BOARD_LATE_INIT
imply SCSI
help
Support for Freescale LS1012A2G5RDB platform.
The LS1012A 2G5 Reference design board (RDB) is a high-performance
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
config TARGET_LS1012AFRDM
bool "Support ls1012afrdm"
select ARCH_LS1012A
...
...
arch/arm/cpu/armv8/Kconfig
浏览文件 @
086ebcd4
...
...
@@ -85,11 +85,12 @@ endmenu
config PSCI_RESET
bool "Use PSCI for reset and shutdown"
default y
depends on !ARCH_EXYNOS7 && !ARCH_BCM283X &&
!TARGET_LS2080A_EMU &&
\
depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \
!TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
!TARGET_LS2080ARDB && !TARGET_LS
1012AQDS
&& \
!TARGET_LS2080ARDB && !TARGET_LS
2080A_EMU
&& \
!TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
!TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \
!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
!TARGET_LS2081ARDB && \
...
...
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
浏览文件 @
086ebcd4
...
...
@@ -578,7 +578,7 @@ int timer_init(void)
#ifdef CONFIG_FSL_LSCH3
u32
__iomem
*
cltbenr
=
(
u32
*
)
CONFIG_SYS_FSL_PMU_CLTBENR
;
#endif
#if
def CONFIG_ARCH_LS2080A
#if
defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
u32
__iomem
*
pctbenr
=
(
u32
*
)
FSL_PMU_PCTBENR_OFFSET
;
u32
svr_dev_id
;
#endif
...
...
@@ -597,7 +597,7 @@ int timer_init(void)
out_le32
(
cltbenr
,
0xf
);
#endif
#if
def CONFIG_ARCH_LS2080A
#if
defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
/*
* In certain Layerscape SoCs, the clock for each core's
* has an enable bit in the PMU Physical Core Time Base Enable
...
...
arch/arm/dts/Makefile
浏览文件 @
086ebcd4
...
...
@@ -209,6 +209,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1046a-rdb.dtb
\
fsl-ls1012a-qds.dtb
\
fsl-ls1012a-rdb.dtb
\
fsl-ls1012a-2g5rdb.dtb
\
fsl-ls1012a-frdm.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD410C)
+=
dragonboard410c.dtb
...
...
arch/arm/dts/fsl-ls1012a-2g5rdb.dts
0 → 100644
浏览文件 @
086ebcd4
/*
*
NXP
ls1012a
2
G5RDB
board
device
tree
source
*
*
Copyright
2017
NXP
*
*
SPDX
-
License
-
Identifier
:
GPL
-
2.0
+
*/
/
dts
-
v1
/;
#
include
"fsl-ls1012a.dtsi"
/
{
model
=
"LS1012A 2G5RDB Board"
;
aliases
{
spi0
=
&
qspi
;
};
chosen
{
stdout
-
path
=
&
duart0
;
};
};
&
qspi
{
bus
-
num
=
<
0
>;
status
=
"okay"
;
qflash0
:
s25fl128s
@
0
{
#
address
-
cells
=
<
1
>;
#
size
-
cells
=
<
1
>;
compatible
=
"spi-flash"
;
spi
-
max
-
frequency
=
<
20000000
>;
reg
=
<
0
>;
};
};
&
i2c0
{
status
=
"okay"
;
};
&
duart0
{
status
=
"okay"
;
};
board/freescale/common/Kconfig
浏览文件 @
086ebcd4
...
...
@@ -7,6 +7,8 @@ config CHAIN_OF_TRUST
select SHA_HW_ACCEL
select SHA_PROG_HW_ACCEL
select ENV_IS_NOWHERE
select CMD_EXT4 if ARM
select CMD_EXT4_WRITE if ARM
bool
default y
...
...
board/freescale/common/cmd_esbc_validate.c
浏览文件 @
086ebcd4
...
...
@@ -23,6 +23,7 @@ loop:
return
0
;
}
#ifndef CONFIG_SPL_BUILD
static
int
do_esbc_validate
(
cmd_tbl_t
*
cmdtp
,
int
flag
,
int
argc
,
char
*
const
argv
[])
{
...
...
@@ -82,3 +83,4 @@ U_BOOT_CMD(
"Put the core in spin loop (Secure Boot Only)"
,
""
);
#endif
board/freescale/common/qixis.c
浏览文件 @
086ebcd4
...
...
@@ -10,6 +10,7 @@
#include <common.h>
#include <command.h>
#include <asm/io.h>
#include <linux/compiler.h>
#include <linux/time.h>
#include <i2c.h>
#include "qixis.h"
...
...
@@ -136,12 +137,13 @@ void board_deassert_mem_reset(void)
}
#endif
void
qixis_reset
(
void
)
#ifndef CONFIG_SPL_BUILD
static
void
qixis_reset
(
void
)
{
QIXIS_WRITE
(
rst_ctl
,
QIXIS_RST_CTL_RESET
);
}
void
qixis_bank_reset
(
void
)
static
void
qixis_bank_reset
(
void
)
{
QIXIS_WRITE
(
rcfg_ctl
,
QIXIS_RCFG_CTL_RECONFIG_IDLE
);
QIXIS_WRITE
(
rcfg_ctl
,
QIXIS_RCFG_CTL_RECONFIG_START
);
...
...
@@ -196,15 +198,12 @@ static void qixis_dump_regs(void)
printf
(
"stat_alrm = %02x
\n
"
,
QIXIS_READ
(
stat_alrm
));
}
static
void
__
qixis_dump_switch
(
void
)
void
__weak
qixis_dump_switch
(
void
)
{
puts
(
"Reverse engineering switch is not implemented for this board
\n
"
);
}
void
qixis_dump_switch
(
void
)
__attribute__
((
weak
,
alias
(
"__qixis_dump_switch"
)));
int
qixis_reset_cmd
(
cmd_tbl_t
*
cmdtp
,
int
flag
,
int
argc
,
char
*
const
argv
[])
static
int
qixis_reset_cmd
(
cmd_tbl_t
*
cmdtp
,
int
flag
,
int
argc
,
char
*
const
argv
[])
{
int
i
;
...
...
@@ -305,3 +304,4 @@ U_BOOT_CMD(
"qixis_reset dump - display the QIXIS registers
\n
"
"qixis_reset switch - display switch
\n
"
);
#endif
board/freescale/ls1012ardb/Kconfig
浏览文件 @
086ebcd4
...
...
@@ -15,3 +15,21 @@ config SYS_CONFIG_NAME
source "board/freescale/common/Kconfig"
endif
if TARGET_LS1012A2G5RDB
config SYS_BOARD
default "ls1012ardb"
config SYS_VENDOR
default "freescale"
config SYS_SOC
default "fsl-layerscape"
config SYS_CONFIG_NAME
default "ls1012a2g5rdb"
source "board/freescale/common/Kconfig"
endif
board/freescale/ls1012ardb/MAINTAINERS
浏览文件 @
086ebcd4
...
...
@@ -8,3 +8,10 @@ F: configs/ls1012ardb_qspi_defconfig
M: Sumit Garg <sumit.garg@nxp.com>
S: Maintained
F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
LS1012A2G5RDB BOARD
M: Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
S: Maintained
F: board/freescale/ls1012ardb/
F: include/configs/ls1012a2g5rdb.h
F: configs/ls1012a2g5rdb_qspi_defconfig
board/freescale/ls1012ardb/README
浏览文件 @
086ebcd4
...
...
@@ -52,3 +52,46 @@ U-boot | 1MB | 0x4010_0000
U-boot Env | 1MB | 0x4020_0000
PPA FIT image | 2MB | 0x4050_0000
Linux ITB | ~53MB | 0x40A0_0000
LS1012A2G5RDB board Overview
-----------------------
- SERDES Connections, 3 lanes supporting:
- SGMII, SGMII 2.5
- SATA 3.0
- DDR Controller
- 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
-QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
signals to
- QSPI NOR flash memory
- USB 3.0
- one high-speed USB 2.0/3.0 port.
- SDIO WiFi, SPI
- 2 I2C controllers
- One SATA onboard connectors
- UART
- The LS1012A processor consists of two UART controllers,
out of which only UART1 is used on 2G5RDB.
- ARM JTAG support
Major Difference between LS1012ARDB and LS1012A-2G5RDB
------------------------------------------------------
1. LS1012A-2G5RDB has Type C USB connector unlike USB Type A/B of LS1012ARDB
2. LS1012A-2G5RDB has 2 2.5G AQR PHY unlike 2 1G Realtek RTL8211FS PHYs
of LS1012ARDB
3. LS1012A-2G5RDB is not having Arduino header
4. LS1012A-2G5RDB doesn't have PCI slot
Booting Options
---------------
QSPI Flash
QSPI flash map
--------------
Images | Size |QSPI Flash Address
------------------------------------------
RCW + PBI | 1MB | 0x4000_0000
U-boot | 1MB | 0x4010_0000
U-boot Env | 1MB | 0x4030_0000
PPA FIT image | 2MB | 0x4040_0000
PFE firmware | 20K | 0x00a0_0000
Linux ITB | ~53MB | 0x4100_0000
board/freescale/ls1012ardb/ls1012ardb.c
浏览文件 @
086ebcd4
...
...
@@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
int
checkboard
(
void
)
{
#ifdef CONFIG_TARGET_LS1012ARDB
u8
in1
;
puts
(
"Board: LS1012ARDB "
);
...
...
@@ -77,7 +78,10 @@ int checkboard(void)
puts
(
": bank2
\n
"
);
else
puts
(
"unknown
\n
"
);
#else
puts
(
"Board: LS1012A2G5RDB "
);
#endif
return
0
;
}
...
...
@@ -150,6 +154,7 @@ int board_init(void)
return
0
;
}
#ifdef CONFIG_TARGET_LS1012ARDB
int
esdhc_status_fixup
(
void
*
blob
,
const
char
*
compat
)
{
char
esdhc1_path
[]
=
"/soc/esdhc@1580000"
;
...
...
@@ -193,7 +198,6 @@ int esdhc_status_fixup(void *blob, const char *compat)
if
(
mux_sdhc2
==
2
||
mux_sdhc2
==
0
)
sdhc2_en
=
true
;
}
if
(
sdhc2_en
)
do_fixup_by_path
(
blob
,
esdhc1_path
,
"status"
,
"okay"
,
sizeof
(
"okay"
),
1
);
...
...
@@ -202,6 +206,7 @@ int esdhc_status_fixup(void *blob, const char *compat)
sizeof
(
"disabled"
),
1
);
return
0
;
}
#endif
int
ft_board_setup
(
void
*
blob
,
bd_t
*
bd
)
{
...
...
board/freescale/ls1021atwr/ls1021atwr.c
浏览文件 @
086ebcd4
...
...
@@ -92,9 +92,7 @@ struct cpld_data {
};
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
static
void
convert_serdes_mux
(
int
type
,
int
need_reset
);
void
cpld_show
(
void
)
static
void
cpld_show
(
void
)
{
struct
cpld_data
*
cpld_data
=
(
void
*
)(
CONFIG_SYS_CPLD_BASE
);
...
...
@@ -292,6 +290,47 @@ int board_eth_init(bd_t *bis)
}
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
static
void
convert_serdes_mux
(
int
type
,
int
need_reset
)
{
char
current_serdes
;
struct
cpld_data
*
cpld_data
=
(
void
*
)(
CONFIG_SYS_CPLD_BASE
);
current_serdes
=
cpld_data
->
serdes_mux
;
switch
(
type
)
{
case
LANEB_SATA
:
current_serdes
&=
~
MASK_LANE_B
;
break
;
case
LANEB_SGMII1
:
current_serdes
|=
(
MASK_LANE_B
|
MASK_SGMII
|
MASK_LANE_C
);
break
;
case
LANEC_SGMII1
:
current_serdes
&=
~
(
MASK_LANE_B
|
MASK_SGMII
|
MASK_LANE_C
);
break
;
case
LANED_SGMII2
:
current_serdes
|=
MASK_LANE_D
;
break
;
case
LANEC_PCIEX1
:
current_serdes
|=
MASK_LANE_C
;
break
;
case
(
LANED_PCIEX2
|
LANEC_PCIEX1
):
current_serdes
|=
MASK_LANE_C
;
current_serdes
&=
~
MASK_LANE_D
;
break
;
default:
printf
(
"CPLD serdes MUX: unsupported MUX type 0x%x
\n
"
,
type
);
return
;
}
cpld_data
->
soft_mux_on
|=
CPLD_SET_MUX_SERDES
;
cpld_data
->
serdes_mux
=
current_serdes
;
if
(
need_reset
==
1
)
{
printf
(
"Reset board to enable configuration
\n
"
);
cpld_data
->
system_rst
=
CONFIG_RESET
;
}
}
int
config_serdes_mux
(
void
)
{
struct
ccsr_gur
__iomem
*
gur
=
(
void
*
)(
CONFIG_SYS_FSL_GUTS_ADDR
);
...
...
@@ -584,7 +623,8 @@ u16 flash_read16(void *addr)
return
(((
val
)
>>
8
)
&
0x00ff
)
|
(((
val
)
<<
8
)
&
0xff00
);
}
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) \
&& !defined(CONFIG_SPL_BUILD)
static
void
convert_flash_bank
(
char
bank
)
{
struct
cpld_data
*
cpld_data
=
(
void
*
)(
CONFIG_SYS_CPLD_BASE
);
...
...
@@ -645,48 +685,7 @@ U_BOOT_CMD(
);
static
void
convert_serdes_mux
(
int
type
,
int
need_reset
)
{
char
current_serdes
;
struct
cpld_data
*
cpld_data
=
(
void
*
)(
CONFIG_SYS_CPLD_BASE
);
current_serdes
=
cpld_data
->
serdes_mux
;
switch
(
type
)
{
case
LANEB_SATA
:
current_serdes
&=
~
MASK_LANE_B
;
break
;
case
LANEB_SGMII1
:
current_serdes
|=
(
MASK_LANE_B
|
MASK_SGMII
|
MASK_LANE_C
);
break
;
case
LANEC_SGMII1
:
current_serdes
&=
~
(
MASK_LANE_B
|
MASK_SGMII
|
MASK_LANE_C
);
break
;
case
LANED_SGMII2
:
current_serdes
|=
MASK_LANE_D
;
break
;
case
LANEC_PCIEX1
:
current_serdes
|=
MASK_LANE_C
;
break
;
case
(
LANED_PCIEX2
|
LANEC_PCIEX1
):
current_serdes
|=
MASK_LANE_C
;
current_serdes
&=
~
MASK_LANE_D
;
break
;
default:
printf
(
"CPLD serdes MUX: unsupported MUX type 0x%x
\n
"
,
type
);
return
;
}
cpld_data
->
soft_mux_on
|=
CPLD_SET_MUX_SERDES
;
cpld_data
->
serdes_mux
=
current_serdes
;
if
(
need_reset
==
1
)
{
printf
(
"Reset board to enable configuration
\n
"
);
cpld_data
->
system_rst
=
CONFIG_RESET
;
}
}
void
print_serdes_mux
(
void
)
static
void
print_serdes_mux
(
void
)
{
char
current_serdes
;
struct
cpld_data
*
cpld_data
=
(
void
*
)(
CONFIG_SYS_CPLD_BASE
);
...
...
board/freescale/ls2080ardb/ls2080ardb.c
浏览文件 @
086ebcd4
...
...
@@ -71,11 +71,10 @@ int checkboard(void)
#ifdef CONFIG_TARGET_LS2081ARDB
#ifdef CONFIG_FSL_QIXIS
sw
=
QIXIS_READ
(
arch
);
printf
(
"Board Arch: V%d, "
,
sw
>>
4
);
printf
(
"Board version: %c, "
,
(
sw
&
0xf
)
+
'A'
);
sw
=
QIXIS_READ
(
brdcfg
[
0
]);
sw
=
(
sw
&
QIXIS_QMAP_MASK
)
>>
QIXIS_QMAP_SHIFT
;
sw
=
(
sw
>>
QIXIS_QMAP_SHIFT
)
&
QIXIS_QMAP_MASK
;
switch
(
sw
)
{
case
0
:
puts
(
"boot from QSPI DEV#0
\n
"
);
...
...
@@ -101,6 +100,7 @@ int checkboard(void)
printf
(
"invalid setting of SW%u
\n
"
,
sw
);
break
;
}
printf
(
"FPGA: v%d.%d
\n
"
,
QIXIS_READ
(
scver
),
QIXIS_READ
(
tagdata
));
#endif
puts
(
"SERDES1 Reference : "
);
printf
(
"Clock1 = 100MHz "
);
...
...
board/freescale/p1010rdb/p1010rdb.c
浏览文件 @
086ebcd4
...
...
@@ -550,6 +550,7 @@ int misc_init_r(void)
return
0
;
}
#ifndef CONFIG_SPL_BUILD
static
int
pin_mux_cmd
(
cmd_tbl_t
*
cmdtp
,
int
flag
,
int
argc
,
char
*
const
argv
[])
{
...
...
@@ -569,3 +570,4 @@ U_BOOT_CMD(
"configure multiplexing pin for IFC/SDHC bus in runtime"
,
"bus_type (e.g. mux sdhc)"
);
#endif
configs/ls1012a2g5rdb_qspi_defconfig
0 → 100644
浏览文件 @
086ebcd4
CONFIG_ARM=y
CONFIG_TARGET_LS1012A2G5RDB=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb"
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
# CONFIG_BLK is not set
CONFIG_DM_MMC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_STORAGE=y
configs/ls1088aqds_sdcard_qspi_defconfig
浏览文件 @
086ebcd4
...
...
@@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
...
...
@@ -35,6 +36,17 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
configs/ls1088ardb_sdcard_qspi_defconfig
浏览文件 @
086ebcd4
...
...
@@ -24,6 +24,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_MMC=y
...
...
@@ -34,6 +35,17 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_E1000=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE=y
CONFIG_SYS_NS16550=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
drivers/serial/serial_lpuart.c
浏览文件 @
086ebcd4
...
...
@@ -265,11 +265,9 @@ static int _lpuart32_serial_getc(struct lpuart_serial_platdata *plat)
lpuart_read32
(
plat
->
flags
,
&
base
->
data
,
&
val
);
if
(
plat
->
devtype
&
DEV_MX7ULP
)
{
lpuart_read32
(
plat
->
flags
,
&
base
->
stat
,
&
stat
);
if
(
stat
&
STAT_OR
)
lpuart_write32
(
plat
->
flags
,
&
base
->
stat
,
STAT_OR
);
}
lpuart_read32
(
plat
->
flags
,
&
base
->
stat
,
&
stat
);
if
(
stat
&
STAT_OR
)
lpuart_write32
(
plat
->
flags
,
&
base
->
stat
,
STAT_OR
);
return
val
&
0x3ff
;
}
...
...
@@ -280,10 +278,8 @@ static void _lpuart32_serial_putc(struct lpuart_serial_platdata *plat,
struct
lpuart_fsl_reg32
*
base
=
plat
->
reg
;
u32
stat
;
if
(
plat
->
devtype
&
DEV_MX7ULP
)
{
if
(
c
==
'\n'
)
serial_putc
(
'\r'
);
}
if
(
c
==
'\n'
)
serial_putc
(
'\r'
);
while
(
true
)
{
lpuart_read32
(
plat
->
flags
,
&
base
->
stat
,
&
stat
);
...
...
@@ -330,7 +326,7 @@ static int _lpuart32_serial_init(struct lpuart_serial_platdata *plat)
lpuart_write32
(
plat
->
flags
,
&
base
->
match
,
0
);
if
(
plat
->
devtype
&
DEV_MX7ULP
)
{
if
(
plat
->
devtype
==
DEV_MX7ULP
)
{
_lpuart32_serial_setbrg_7ulp
(
plat
,
gd
->
baudrate
);
}
else
{
/* provide data bits, parity, stop bit, etc */
...
...
@@ -347,7 +343,7 @@ static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
struct
lpuart_serial_platdata
*
plat
=
dev
->
platdata
;
if
(
is_lpuart32
(
dev
))
{
if
(
plat
->
devtype
&
DEV_MX7ULP
)
if
(
plat
->
devtype
==
DEV_MX7ULP
)
_lpuart32_serial_setbrg_7ulp
(
plat
,
baudrate
);
else
_lpuart32_serial_setbrg
(
plat
,
baudrate
);
...
...
env/sf.c
浏览文件 @
086ebcd4
...
...
@@ -34,6 +34,7 @@
#ifndef CONFIG_SPL_BUILD
#define CMD_SAVEENV
#define INITENV
#endif
#ifdef CONFIG_ENV_OFFSET_REDUND
...
...
@@ -348,6 +349,23 @@ out:
}
#endif
#if defined(INITENV) && defined(CONFIG_ENV_ADDR)
static
int
env_sf_init
(
void
)
{
env_t
*
env_ptr
=
(
env_t
*
)(
CONFIG_ENV_ADDR
);
if
(
crc32
(
0
,
env_ptr
->
data
,
ENV_SIZE
)
==
env_ptr
->
crc
)
{
gd
->
env_addr
=
(
ulong
)
&
(
env_ptr
->
data
);
gd
->
env_valid
=
1
;
}
else
{
gd
->
env_addr
=
(
ulong
)
&
default_environment
[
0
];
gd
->
env_valid
=
1
;
}
return
0
;
}
#endif
U_BOOT_ENV_LOCATION
(
sf
)
=
{
.
location
=
ENVL_SPI_FLASH
,
ENV_NAME
(
"SPI Flash"
)
...
...
@@ -355,4 +373,7 @@ U_BOOT_ENV_LOCATION(sf) = {
#ifdef CMD_SAVEENV
.
save
=
env_save_ptr
(
env_sf_save
),
#endif
#if defined(INITENV) && defined(CONFIG_ENV_ADDR)
.
init
=
env_sf_init
,
#endif
};
include/configs/ls1012a2g5rdb.h
0 → 100644
浏览文件 @
086ebcd4
/*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __LS1012A2G5RDB_H__
#define __LS1012A2G5RDB_H__
#include "ls1012a_common.h"
/* PFE Ethernet */
#ifdef CONFIG_FSL_PFE
#define EMAC1_PHY_ADDR 0x2
#define EMAC2_PHY_ADDR 0x1
#define CONFIG_PHYLIB
#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_AQUANTIA
#endif
/* DDR */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_SYS_SDRAM_SIZE 0x40000000
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
/* MMC */
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
/* SATA */
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_NET_MULTI
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
"kernelheader_addr=0x800000\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
"fdtheader_addr_r=0x80100000\0" \
"kernelheader_addr_r=0x80200000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x90000000\0" \
"load_addr=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
"console=ttyS0,115200\0" \
BOOTENV \
"boot_scripts=ls1012ardb_boot.scr\0" \
"boot_script_hdr=hdr_ls1012ardb_bs.out\0" \
"scan_dev_for_boot_part=" \
"part list ${devtype} ${devnum} devplist; " \
"env exists devplist || setenv devplist 1; " \
"for distro_bootpart in ${devplist}; do " \
"if fstype ${devtype} " \
"${devnum}:${distro_bootpart} " \
"bootfstype; then " \
"run scan_dev_for_boot; " \
"fi; " \
"done\0" \
"scan_dev_for_boot=" \
"echo Scanning ${devtype} " \
"${devnum}:${distro_bootpart}...; " \
"for prefix in ${boot_prefixes}; do " \
"run scan_dev_for_scripts; " \
"done;" \
"\0" \
"boot_a_script=" \
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; " \
"env exists secureboot && load ${devtype} " \
"${devnum}:${distro_bootpart} " \
"${scripthdraddr} ${prefix}${boot_script_hdr} " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
"installer=load mmc 0:2 $load_addr " \
"/flex_installer_arm64.itb; " \
"bootm $load_addr#$board\0" \
"qspi_bootcmd=echo Trying load from qspi..;" \
"sf probe && sf read $load_addr " \
"$kernel_addr $kernel_size; env exists secureboot " \
"&& sf read $kernelheader_addr_r $kernelheader_addr " \
"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
"bootm $load_addr#$board\0"
#undef CONFIG_BOOTCOMMAND
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
#endif
#define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
#define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1"
#include <asm/fsl_secure_boot.h>
#endif
/* __LS1012A2G5RDB_H__ */
include/configs/ls1012a_common.h
浏览文件 @
086ebcd4
...
...
@@ -69,6 +69,16 @@
#define CONFIG_ENV_SECT_SIZE 0x40000
#endif
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
...
...
@@ -90,6 +100,7 @@
#include <config_distro_defaults.h>
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(SCSI, scsi, 0) \
func(MMC, mmc, 0) \
func(USB, usb, 0)
#include <config_distro_bootcmd.h>
...
...
include/configs/ls1012aqds.h
浏览文件 @
086ebcd4
...
...
@@ -113,16 +113,6 @@
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_PCIE1
/* PCIE controller 1 */
#define CONFIG_PCI_SCAN_SHOW
...
...
include/configs/ls1012ardb.h
浏览文件 @
086ebcd4
...
...
@@ -46,15 +46,6 @@
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_PCIE1
/* PCIE controller 1 */
...
...
include/configs/ls1046a_common.h
浏览文件 @
086ebcd4
...
...
@@ -145,6 +145,18 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
/* SATA */
#ifndef SPL_NO_SATA
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#endif
/* Command line configuration */
/* MMC */
...
...
@@ -197,6 +209,7 @@
#include <config_distro_defaults.h>
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(SCSI, scsi, 0) \
func(MMC, mmc, 0) \
func(USB, usb, 0)
#include <config_distro_bootcmd.h>
...
...
include/configs/ls1046aqds.h
浏览文件 @
086ebcd4
...
...
@@ -136,9 +136,6 @@ unsigned long get_board_ddr_clk(void);
#define CFG_LPUART_EN 0x2
#endif
/* SATA */
#define CONFIG_SCSI_AHCI_PLAT
/* EEPROM */
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
...
...
@@ -148,13 +145,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
/*
* IFC Definitions
*/
...
...
include/configs/ls1046ardb.h
浏览文件 @
086ebcd4
...
...
@@ -211,18 +211,6 @@
#endif
#endif
/* SATA */
#ifndef SPL_NO_SATA
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#endif
#ifndef SPL_NO_MISC
#undef CONFIG_BOOTCOMMAND
#if defined(CONFIG_QSPI_BOOT)
...
...
include/configs/ls1088a_common.h
浏览文件 @
086ebcd4
...
...
@@ -45,6 +45,12 @@
#define CONFIG_SUPPORT_RAW_INITRD
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
#define CONFIG_ENV_OFFSET 0x300000
/* 3MB */
#define CONFIG_ENV_ADDR (CONFIG_SYS_FSL_QSPI_BASE + \
CONFIG_ENV_OFFSET)
#endif
#define CONFIG_SKIP_LOWLEVEL_INIT
...
...
include/configs/ls1088aqds.h
浏览文件 @
086ebcd4
...
...
@@ -21,7 +21,6 @@ unsigned long get_board_ddr_clk(void);
#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_SIZE 0x2000
/* 8KB */
#define CONFIG_ENV_OFFSET 0x300000
/* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x40000
#elif defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
...
...
include/configs/ls1088ardb.h
浏览文件 @
086ebcd4
...
...
@@ -17,7 +17,6 @@
#if defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_SIZE 0x2000
/* 8KB */
#define CONFIG_ENV_OFFSET 0x300000
/* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x40000
#elif defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
...
...
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