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04e93ec9
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体验新版 GitCode,发现更多精彩内容 >>
提交
04e93ec9
编写于
4月 13, 2005
作者:
S
stroese
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
Update for esd apc405
上级
2a8af187
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
2348 addition
and
2299 deletion
+2348
-2299
board/esd/apc405/apc405.c
board/esd/apc405/apc405.c
+64
-3
board/esd/apc405/fpgadata.c
board/esd/apc405/fpgadata.c
+2280
-2295
include/configs/APC405.h
include/configs/APC405.h
+4
-1
未找到文件。
board/esd/apc405/apc405.c
浏览文件 @
04e93ec9
...
@@ -63,10 +63,56 @@ unsigned char logo_bmp[] =
...
@@ -63,10 +63,56 @@ unsigned char logo_bmp[] =
*/
*/
#include "../common/lcd.c"
#include "../common/lcd.c"
#include
"../common/"
CFG_LCD_HEADER_NAME
#include CFG_LCD_HEADER_NAME
#endif
/* CONFIG_LCD_USED */
#endif
/* CONFIG_LCD_USED */
int
board_revision
(
void
)
{
unsigned
long
cntrl0Reg
;
unsigned
long
value
;
/*
* Get version of APC405 board from GPIO's
*/
/*
* Setup GPIO pins (CS2/GPIO11 and CS3/GPIO12 as GPIO)
*/
cntrl0Reg
=
mfdcr
(
cntrl0
);
mtdcr
(
cntrl0
,
cntrl0Reg
|
0x03000000
);
out32
(
GPIO0_ODR
,
in32
(
GPIO0_ODR
)
&
~
0x00180000
);
out32
(
GPIO0_TCR
,
in32
(
GPIO0_TCR
)
&
~
0x00180000
);
udelay
(
1000
);
/* wait some time before reading input */
value
=
in32
(
GPIO0_IR
)
&
0x00180000
;
/* get config bits */
/*
* Restore GPIO settings
*/
mtdcr
(
cntrl0
,
cntrl0Reg
);
switch
(
value
)
{
case
0x00180000
:
/* CS2==1 && CS3==1 -> version <= 1.2 */
return
2
;
case
0x00080000
:
/* CS2==0 && CS3==1 -> version 1.3 */
return
3
;
#if 0 /* not yet manufactured ! */
case 0x00100000:
/* CS2==1 && CS3==0 -> version 1.4 */
return 4;
case 0x00000000:
/* CS2==0 && CS3==0 -> version 1.5 */
return 5;
#endif
default:
/* should not be reached! */
return
0
;
}
}
int
board_early_init_f
(
void
)
int
board_early_init_f
(
void
)
{
{
/*
/*
...
@@ -120,8 +166,12 @@ int misc_init_f (void)
...
@@ -120,8 +166,12 @@ int misc_init_f (void)
int
misc_init_r
(
void
)
int
misc_init_r
(
void
)
{
{
DECLARE_GLOBAL_DATA_PTR
;
volatile
unsigned
short
*
fpga_mode
=
volatile
unsigned
short
*
fpga_mode
=
(
unsigned
short
*
)((
ulong
)
CFG_FPGA_BASE_ADDR
+
CFG_FPGA_CTRL
);
(
unsigned
short
*
)((
ulong
)
CFG_FPGA_BASE_ADDR
+
CFG_FPGA_CTRL
);
volatile
unsigned
short
*
fpga_ctrl2
=
(
unsigned
short
*
)((
ulong
)
CFG_FPGA_BASE_ADDR
+
CFG_FPGA_CTRL2
);
volatile
unsigned
char
*
duart0_mcr
=
volatile
unsigned
char
*
duart0_mcr
=
(
unsigned
char
*
)((
ulong
)
DUART0_BA
+
4
);
(
unsigned
char
*
)((
ulong
)
DUART0_BA
+
4
);
volatile
unsigned
char
*
duart1_mcr
=
volatile
unsigned
char
*
duart1_mcr
=
...
@@ -204,6 +254,11 @@ int misc_init_r (void)
...
@@ -204,6 +254,11 @@ int misc_init_r (void)
SET_FPGA
(
FPGA_PRG
|
FPGA_CLK
|
FPGA_DATA
);
SET_FPGA
(
FPGA_PRG
|
FPGA_CLK
|
FPGA_DATA
);
udelay
(
1000
);
/* wait 1ms */
udelay
(
1000
);
/* wait 1ms */
/*
* Write board revision in FPGA
*/
*
fpga_ctrl2
=
(
*
fpga_ctrl2
&
0xfff0
)
|
(
gd
->
board_type
&
0x000f
);
/*
/*
* Enable power on PS/2 interface (with reset)
* Enable power on PS/2 interface (with reset)
*/
*/
...
@@ -228,8 +283,11 @@ int misc_init_r (void)
...
@@ -228,8 +283,11 @@ int misc_init_r (void)
logo_bmp
,
sizeof
(
logo_bmp
));
logo_bmp
,
sizeof
(
logo_bmp
));
/*
/*
*
Enable
microcontroller and setup backlight PWM controller
*
Reset
microcontroller and setup backlight PWM controller
*/
*/
*
fpga_mode
|=
0x0014
;
for
(
i
=
0
;
i
<
10
;
i
++
)
udelay
(
1000
);
*
fpga_mode
|=
0x001c
;
*
fpga_mode
|=
0x001c
;
*
fuji_lcdbl_pwm
=
0x00ff
;
*
fuji_lcdbl_pwm
=
0x00ff
;
...
@@ -243,6 +301,8 @@ int misc_init_r (void)
...
@@ -243,6 +301,8 @@ int misc_init_r (void)
int
checkboard
(
void
)
int
checkboard
(
void
)
{
{
DECLARE_GLOBAL_DATA_PTR
;
unsigned
char
str
[
64
];
unsigned
char
str
[
64
];
int
i
=
getenv_r
(
"serial#"
,
str
,
sizeof
(
str
));
int
i
=
getenv_r
(
"serial#"
,
str
,
sizeof
(
str
));
...
@@ -254,7 +314,8 @@ int checkboard (void)
...
@@ -254,7 +314,8 @@ int checkboard (void)
puts
(
str
);
puts
(
str
);
}
}
putc
(
'\n'
);
gd
->
board_type
=
board_revision
();
printf
(
", Rev 1.%ld
\n
"
,
gd
->
board_type
);
/*
/*
* Disable sleep mode in LXT971
* Disable sleep mode in LXT971
...
...
board/esd/apc405/fpgadata.c
浏览文件 @
04e93ec9
因为 它太大了无法显示 source diff 。你可以改为
查看blob
。
include/configs/APC405.h
浏览文件 @
04e93ec9
...
@@ -42,6 +42,8 @@
...
@@ -42,6 +42,8 @@
#define CONFIG_SYS_CLK_FREQ 33333400
/* external frequency to pll */
#define CONFIG_SYS_CLK_FREQ 33333400
/* external frequency to pll */
#define CONFIG_BOARD_TYPES 1
/* support board types */
#define CONFIG_BAUDRATE 9600
#define CONFIG_BAUDRATE 9600
#define CONFIG_BOOTDELAY 3
/* autoboot after 3 seconds */
#define CONFIG_BOOTDELAY 3
/* autoboot after 3 seconds */
...
@@ -321,6 +323,7 @@
...
@@ -321,6 +323,7 @@
/* FPGA internal regs */
/* FPGA internal regs */
#define CFG_FPGA_CTRL 0x008
#define CFG_FPGA_CTRL 0x008
#define CFG_FPGA_CTRL2 0x00a
/* FPGA Control Reg */
/* FPGA Control Reg */
#define CFG_FPGA_CTRL_CF_RESET 0x0001
#define CFG_FPGA_CTRL_CF_RESET 0x0001
...
@@ -348,7 +351,7 @@
...
@@ -348,7 +351,7 @@
/* Image information... */
/* Image information... */
#define CONFIG_LCD_USED CONFIG_LCD_BIG
#define CONFIG_LCD_USED CONFIG_LCD_BIG
#define CFG_LCD_HEADER_NAME "s1d13806_640_480_16bpp.h"
#define CFG_LCD_HEADER_NAME "
../common/
s1d13806_640_480_16bpp.h"
#define CFG_LCD_LOGO_NAME "logo_640_480_24bpp.c"
#define CFG_LCD_LOGO_NAME "logo_640_480_24bpp.c"
#define CFG_LCD_MEM CFG_LCD_BIG_MEM
#define CFG_LCD_MEM CFG_LCD_BIG_MEM
...
...
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