ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips
Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit bus width
Signed-off-by: NLudwig Zenz <lzenz@dh-electronics.de>
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Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit bus width
Signed-off-by: NLudwig Zenz <lzenz@dh-electronics.de>