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提交 015e3348 编写于 作者: S Simon Glass 提交者： Tom Rini
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common: Drop floppy disk support 

This seems pretty old now. It has not been converted to driver model and
is not used by any boards.

Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
上级 a6f2aafe
展开全部 隐藏空白更改
内联 并排
Showing with 1 addition and 1159 deletion
README
浏览文件 @ 015e3348
......@@ -2870,32 +2870,6 @@ Low Level (hardware related) configuration options:
If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
forced to a value that ensures that CCSR is not relocated.
- Floppy Disk Support:
CONFIG_SYS_FDC_DRIVE_NUMBER
the default drive number (default value 0)
CONFIG_SYS_ISA_IO_STRIDE
defines the spacing between FDC chipset registers
(default value 1)
CONFIG_SYS_ISA_IO_OFFSET
defines the offset of register from address. It
depends on which part of the data bus is connected to
the FDC chipset. (default value 0)
If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
default value.
if CONFIG_SYS_FDC_HW_INIT is defined, then the function
fdc_hw_init() is called at the beginning of the FDC
setup. fdc_hw_init() must be provided by the board
source code. It is used to make hardware-dependent
initializations.
- CONFIG_IDE_AHB:
Most IDE controllers were designed to be connected with PCI
interface. Only few of them were designed for AHB interface.
......
cmd/Kconfig
浏览文件 @ 015e3348
......@@ -858,11 +858,6 @@ config CMD_FASTBOOT
See doc/android/fastboot.txt for more information.
config CMD_FDC
bool "fdcboot - Boot from floppy device"
help
The 'fdtboot' command allows booting an image from a floppy disk.
config CMD_FLASH
bool "flinfo, erase, protect"
default y
......
cmd/Makefile
浏览文件 @ 015e3348
......@@ -58,7 +58,6 @@ obj-$(CONFIG_HUSH_PARSER) += exit.o
obj-$(CONFIG_CMD_EXT4) += ext4.o
obj-$(CONFIG_CMD_EXT2) += ext2.o
obj-$(CONFIG_CMD_FAT) += fat.o
obj-$(CONFIG_CMD_FDC) += fdc.o
obj-$(CONFIG_CMD_FDT) += fdt.o
obj-$(CONFIG_CMD_FITUPD) += fitupd.o
obj-$(CONFIG_CMD_FLASH) += flash.o
......
cmd/fdc.c 已删除 100644 → 0
浏览文件 @ a6f2aafe
此差异已折叠。
drivers/misc/Makefile
浏览文件 @ 015e3348
......@@ -51,7 +51,6 @@ obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
obj-$(CONFIG_NS87308) += ns87308.o
obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
obj-$(CONFIG_P2SB) += p2sb-uclass.o
obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
......
drivers/misc/ns87308.c 已删除 100644 → 0
浏览文件 @ a6f2aafe
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2000
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*/
#include <config.h>
#include <ns87308.h>
void initialise_ns87308 (void)
{
#ifdef CONFIG_SYS_NS87308_PS2MOD
unsigned char data;
/*
* Switch floppy drive to PS/2 mode.
*/
read_pnp_config(SUPOERIO_CONF1, &data);
data &= 0xFB;
write_pnp_config(SUPOERIO_CONF1, data);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_KBC1)
PNP_SET_DEVICE_BASE(LDEV_KBC1, CONFIG_SYS_NS87308_KBC1_BASE);
write_pnp_config(LUN_CONFIG_REG, 0);
write_pnp_config(CBASE_HIGH, 0x00);
write_pnp_config(CBASE_LOW, 0x64);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_MOUSE)
PNP_ACTIVATE_DEVICE(LDEV_MOUSE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RTC_APC)
PNP_SET_DEVICE_BASE(LDEV_RTC_APC, CONFIG_SYS_NS87308_RTC_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_FDC)
PNP_SET_DEVICE_BASE(LDEV_FDC, CONFIG_SYS_NS87308_FDC_BASE);
write_pnp_config(LUN_CONFIG_REG, 0x40);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_RARP)
PNP_SET_DEVICE_BASE(LDEV_PARP, CONFIG_SYS_NS87308_LPT_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART1)
PNP_SET_DEVICE_BASE(LDEV_UART1, CONFIG_SYS_NS87308_UART1_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_UART2)
PNP_SET_DEVICE_BASE(LDEV_UART2, CONFIG_SYS_NS87308_UART2_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_GPIO)
PNP_SET_DEVICE_BASE(LDEV_GPIO, CONFIG_SYS_NS87308_GPIO_BASE);
#endif
#if (CONFIG_SYS_NS87308_DEVS & CONFIG_SYS_NS87308_POWRMAN)
#ifndef CONFIG_SYS_NS87308_PWMAN_BASE
PNP_ACTIVATE_DEVICE(LDEV_POWRMAN);
#else
PNP_SET_DEVICE_BASE(LDEV_POWRMAN, CONFIG_SYS_NS87308_PWMAN_BASE);
/*
* Enable all units
*/
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER1, 0x7d);
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_FER2, 0x87);
#ifdef CONFIG_SYS_NS87308_PMC1
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC1, CONFIG_SYS_NS87308_PMC1);
#endif
#ifdef CONFIG_SYS_NS87308_PMC2
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC2, CONFIG_SYS_NS87308_PMC2);
#endif
#ifdef CONFIG_SYS_NS87308_PMC3
write_pm_reg(CONFIG_SYS_NS87308_PWMAN_BASE, PWM_PMC3, CONFIG_SYS_NS87308_PMC3);
#endif
#endif
#endif
#ifdef CONFIG_SYS_NS87308_CS0_BASE
PNP_PGCS_CSLINE_BASE(0, CONFIG_SYS_NS87308_CS0_BASE);
PNP_PGCS_CSLINE_CONF(0, CONFIG_SYS_NS87308_CS0_CONF);
#endif
#ifdef CONFIG_SYS_NS87308_CS1_BASE
PNP_PGCS_CSLINE_BASE(1, CONFIG_SYS_NS87308_CS1_BASE);
PNP_PGCS_CSLINE_CONF(1, CONFIG_SYS_NS87308_CS1_CONF);
#endif
#ifdef CONFIG_SYS_NS87308_CS2_BASE
PNP_PGCS_CSLINE_BASE(2, CONFIG_SYS_NS87308_CS2_BASE);
PNP_PGCS_CSLINE_CONF(2, CONFIG_SYS_NS87308_CS2_CONF);
#endif
}
drivers/serial/serial_ns16550.c
浏览文件 @ 015e3348
......@@ -5,14 +5,9 @@
*/
#include <common.h>
#include <linux/compiler.h>
#include <ns16550.h>
#ifdef CONFIG_NS87308
#include <ns87308.h>
#endif
#include <serial.h>
#include <linux/compiler.h>
#ifndef CONFIG_NS16550_MIN_FUNCTIONS
......
include/common.h
浏览文件 @ 015e3348
......@@ -89,7 +89,6 @@ phys_size_t get_effective_memsize(void);
/* $(BOARD)/$(BOARD).c */
void reset_phy (void);
void fdc_hw_init (void);
#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
# define CONFIG_SYS_DEF_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR
......
include/ns87308.h 已删除 100644 → 0
浏览文件 @ a6f2aafe
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2000
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*/
#ifndef _NS87308_H_
#define _NS87308_H_
#include <asm/pci_io.h>
/* Note: I couldn't find a full data sheet for the ns87308, but the ns87307 seems to be pretty
functionally- (and pin-) equivalent to the 87308, but the 308 has better ir support. */
void initialise_ns87308(void);
/*
* The following struct represents the GPIO registers on the NS87308/NS97307
*/
struct GPIO
{
unsigned char dta1; /* 0 data port 1 */
unsigned char dir1; /* 1 direction port 1 */
unsigned char out1; /* 2 output type port 1 */
unsigned char puc1; /* 3 pull-up control port 1 */
unsigned char dta2; /* 4 data port 2 */
unsigned char dir2; /* 5 direction port 2 */
unsigned char out2; /* 6 output type port 2 */
unsigned char puc2; /* 7 pull-up control port 2 */
};
/*
* The following represents the power management registers on the NS87308/NS97307
*/
#define PWM_FER1 0 /* 0 function enable reg. 1 */
#define PWM_FER2 1 /* 1 function enable reg. 2 */
#define PWM_PMC1 2 /* 2 power mgmt. control 1 */
#define PWM_PMC2 3 /* 3 power mgmt. control 2 */
#define PWM_PMC3 4 /* 4 power mgmt. control 3 */
#define PWM_WDTO 5 /* 5 watchdog time-out */
#define PWM_WDCF 6 /* 6 watchdog config. */
#define PWM_WDST 7 /* 7 watchdog status */
/*PNP config registers:
* these depend on the stated of BADDR1 and BADDR0 on startup
* so there's three versions here with the last two digits indicating
* for which configuration their valid
* the 1st of the two digits indicates the state of BADDR1
* the 2st of the two digits indicates the state of BADDR0
*/
#define IO_INDEX_OFFSET_0x 0x0279 /* full PnP isa Mode */
#define IO_INDEX_OFFSET_10 0x015C /* PnP motherboard mode */
#define IO_INDEX_OFFSET_11 0x002E /* PnP motherboard mode */
#define IO_DATA_OFFSET_0x 0x0A79 /* full PnP isa Mode */
#define IO_DATA_OFFSET_10 0x015D /* PnP motherboard mode */
#define IO_DATA_OFFSET_11 0x002F /* PnP motherboard mode */
#if defined(CONFIG_SYS_NS87308_BADDR_0x)
#define IO_INDEX (CONFIG_SYS_ISA_IO + IO_INDEX_OFFSET_0x)
#define IO_DATA (CONFIG_SYS_ISA_IO + IO_DATA_OFFSET_0x)
#elif defined(CONFIG_SYS_NS87308_BADDR_10)
#define IO_INDEX (CONFIG_SYS_ISA_IO + IO_INDEX_OFFSET_10)
#define IO_DATA (CONFIG_SYS_ISA_IO + IO_DATA_OFFSET_10)
#elif defined(CONFIG_SYS_NS87308_BADDR_11)
#define IO_INDEX (CONFIG_SYS_ISA_IO + IO_INDEX_OFFSET_11)
#define IO_DATA (CONFIG_SYS_ISA_IO + IO_DATA_OFFSET_11)
#endif
/* PnP register definitions */
#define SET_RD_DATA_PORT 0x00
#define SERIAL_ISOLATION 0x01
#define CONFIG_CONTROL 0x02
#define WAKE_CSN 0x03
#define RES_DATA 0x04
#define STATUS 0x05
#define SET_CSN 0x06
#define LOGICAL_DEVICE 0x07
/*vendor defined values */
#define SID_REG 0x20
#define SUPOERIO_CONF1 0x21
#define SUPOERIO_CONF2 0x22
#define PGCS_INDEX 0x23
#define PGCS_DATA 0x24
/* values above 30 are different for each logical device
but I can't be arsed to enter them all. the ones here
are pretty consistent between all logical devices
feel free to correct the situation if you want.. ;)
*/
#define ACTIVATE 0x30
#define ACTIVATE_OFF 0x00
#define ACTIVATE_ON 0x01
#define BASE_ADDR_HIGH 0x60
#define BASE_ADDR_LOW 0x61
#define LUN_CONFIG_REG 0xF0
#define DBASE_HIGH 0x60 /* SIO KBC data base address, 15:8 */
#define DBASE_LOW 0x61 /* SIO KBC data base address, 7:0 */
#define CBASE_HIGH 0x62 /* SIO KBC command base addr, 15:8 */
#define CBASE_LOW 0x63 /* SIO KBC command base addr, 7:0 */
/* the logical devices*/
#define LDEV_KBC1 0x00 /* 2 devices for keyboard and mouse controller*/
#define LDEV_KBC2 0x01
#define LDEV_MOUSE 0x01
#define LDEV_RTC_APC 0x02 /*Real Time Clock and Advanced Power Control*/
#define LDEV_FDC 0x03 /*floppy disk controller*/
#define LDEV_PARP 0x04 /*Parallel port*/
#define LDEV_UART2 0x05
#define LDEV_UART1 0x06
#define LDEV_GPIO 0x07 /*General Purpose IO and chip select output signals*/
#define LDEV_POWRMAN 0x08 /*Power Managment*/
#define CONFIG_SYS_NS87308_KBC1 (1 << LDEV_KBC1)
#define CONFIG_SYS_NS87308_KBC2 (1 << LDEV_KBC2)
#define CONFIG_SYS_NS87308_MOUSE (1 << LDEV_MOUSE)
#define CONFIG_SYS_NS87308_RTC_APC (1 << LDEV_RTC_APC)
#define CONFIG_SYS_NS87308_FDC (1 << LDEV_FDC)
#define CONFIG_SYS_NS87308_PARP (1 << LDEV_PARP)
#define CONFIG_SYS_NS87308_UART2 (1 << LDEV_UART2)
#define CONFIG_SYS_NS87308_UART1 (1 << LDEV_UART1)
#define CONFIG_SYS_NS87308_GPIO (1 << LDEV_GPIO)
#define CONFIG_SYS_NS87308_POWRMAN (1 << LDEV_POWRMAN)
/*some functions and macro's for doing configuration */
static inline void read_pnp_config(unsigned char index, unsigned char *data)
{
pci_writeb(index,IO_INDEX);
pci_readb(IO_DATA, *data);
}
static inline void write_pnp_config(unsigned char index, unsigned char data)
{
pci_writeb(index,IO_INDEX);
pci_writeb(data, IO_DATA);
}
static inline void pnp_set_device(unsigned char dev)
{
write_pnp_config(LOGICAL_DEVICE, dev);
}
static inline void write_pm_reg(unsigned short base, unsigned char index, unsigned char data)
{
pci_writeb(index, CONFIG_SYS_ISA_IO + base);
eieio();
pci_writeb(data, CONFIG_SYS_ISA_IO + base + 1);
}
/*void write_pnp_config(unsigned char index, unsigned char data);
void pnp_set_device(unsigned char dev);
*/
#define PNP_SET_DEVICE_BASE(dev,base) \
pnp_set_device(dev); \
write_pnp_config(ACTIVATE, ACTIVATE_OFF); \
write_pnp_config(BASE_ADDR_HIGH, ((base) >> 8) & 0xff ); \
write_pnp_config(BASE_ADDR_LOW, (base) &0xff); \
write_pnp_config(ACTIVATE, ACTIVATE_ON);
#define PNP_ACTIVATE_DEVICE(dev) \
pnp_set_device(dev); \
write_pnp_config(ACTIVATE, ACTIVATE_ON);
#define PNP_DEACTIVATE_DEVICE(dev) \
pnp_set_device(dev); \
write_pnp_config(ACTIVATE, ACTIVATE_OFF);
static inline void write_pgcs_config(unsigned char index, unsigned char data)
{
write_pnp_config(PGCS_INDEX, index);
write_pnp_config(PGCS_DATA, data);
}
/* these macrose configure the 3 CS lines
on the sandpoint board these controll NVRAM
CS0 is connected to NVRAMCS
CS1 is connected to NVRAMAS0
CS2 is connected to NVRAMAS1
*/
#define PGCS_CS_ASSERT_ON_WRITE 0x10
#define PGCS_CS_ASSERT_ON_READ 0x20
#define PNP_PGCS_CSLINE_BASE(cs, base) \
write_pgcs_config((cs) << 2, ((base) >> 8) & 0xff ); \
write_pgcs_config(((cs) << 2) + 1, (base) & 0xff );
#define PNP_PGCS_CSLINE_CONF(cs, conf) \
write_pgcs_config(((cs) << 2) + 2, (conf) );
/* The following sections are for 87308 extensions to the standard compoents it emulates */
/* extensions to 16550*/
#define MCR_MDSL_MSK 0xe0 /*mode select mask*/
#define MCR_MDSL_UART 0x00 /*uart, default*/
#define MCR_MDSL_SHRPIR 0x02 /*Sharp IR*/
#define MCR_MDSL_SIR 0x03 /*SIR*/
#define MCR_MDSL_CIR 0x06 /*Consumer IR*/
#define FCR_TXFTH0 0x10 /* these bits control threshod of data level in fifo */
#define FCR_TXFTH1 0x20 /* for interrupt trigger */
/*
* Default NS87308 configuration
*/
#ifndef CONFIG_SYS_NS87308_KBC1_BASE
#define CONFIG_SYS_NS87308_KBC1_BASE 0x0060
#endif
#ifndef CONFIG_SYS_NS87308_RTC_BASE
#define CONFIG_SYS_NS87308_RTC_BASE 0x0070
#endif
#ifndef CONFIG_SYS_NS87308_FDC_BASE
#define CONFIG_SYS_NS87308_FDC_BASE 0x03F0
#endif
#ifndef CONFIG_SYS_NS87308_LPT_BASE
#define CONFIG_SYS_NS87308_LPT_BASE 0x0278
#endif
#ifndef CONFIG_SYS_NS87308_UART1_BASE
#define CONFIG_SYS_NS87308_UART1_BASE 0x03F8
#endif
#ifndef CONFIG_SYS_NS87308_UART2_BASE
#define CONFIG_SYS_NS87308_UART2_BASE 0x02F8
#endif
#endif /*_NS87308_H_*/
scripts/config_whitelist.txt
浏览文件 @ 015e3348
......@@ -1236,7 +1236,6 @@ CONFIG_NO_WAIT
CONFIG_NR_DRAM_POPULATED
CONFIG_NS16550_MIN_FUNCTIONS
CONFIG_NS8382X
CONFIG_NS87308
CONFIG_NUM_DSP_CPUS
CONFIG_NUM_PAMU
CONFIG_ODROID_REV_AIN
......@@ -2291,8 +2290,6 @@ CONFIG_SYS_FAST_CLK
CONFIG_SYS_FAULT_ECHO_LINK_DOWN
CONFIG_SYS_FAULT_MII_ADDR
CONFIG_SYS_FCC_PSMR
CONFIG_SYS_FDC_DRIVE_NUMBER
CONFIG_SYS_FDC_HW_INIT
CONFIG_SYS_FDT_BASE
CONFIG_SYS_FDT_LOAD_ADDR
CONFIG_SYS_FDT_PAD
......@@ -2967,8 +2964,6 @@ CONFIG_SYS_IO_BASE
CONFIG_SYS_ISA_BASE
CONFIG_SYS_ISA_IO
CONFIG_SYS_ISA_IO_BASE_ADDRESS
CONFIG_SYS_ISA_IO_OFFSET
CONFIG_SYS_ISA_IO_STRIDE
CONFIG_SYS_ISA_MEM
CONFIG_SYS_JFFS2_FIRST_BANK
CONFIG_SYS_JFFS2_FIRST_SECTOR
......@@ -3328,35 +3323,6 @@ CONFIG_SYS_NS16550_MEM32
CONFIG_SYS_NS16550_PORT_MAPPED
CONFIG_SYS_NS16550_REG_SIZE
CONFIG_SYS_NS16550_SERIAL
CONFIG_SYS_NS87308_CS0_BASE
CONFIG_SYS_NS87308_CS0_CONF
CONFIG_SYS_NS87308_CS1_BASE
CONFIG_SYS_NS87308_CS1_CONF
CONFIG_SYS_NS87308_CS2_BASE
CONFIG_SYS_NS87308_CS2_CONF
CONFIG_SYS_NS87308_FDC
CONFIG_SYS_NS87308_FDC_BASE
CONFIG_SYS_NS87308_GPIO
CONFIG_SYS_NS87308_GPIO_BASE
CONFIG_SYS_NS87308_KBC1
CONFIG_SYS_NS87308_KBC1_BASE
CONFIG_SYS_NS87308_KBC2
CONFIG_SYS_NS87308_LPT_BASE
CONFIG_SYS_NS87308_MOUSE
CONFIG_SYS_NS87308_PARP
CONFIG_SYS_NS87308_PMC1
CONFIG_SYS_NS87308_PMC2
CONFIG_SYS_NS87308_PMC3
CONFIG_SYS_NS87308_POWRMAN
CONFIG_SYS_NS87308_PS2MOD
CONFIG_SYS_NS87308_PWMAN_BASE
CONFIG_SYS_NS87308_RARP
CONFIG_SYS_NS87308_RTC_APC
CONFIG_SYS_NS87308_RTC_BASE
CONFIG_SYS_NS87308_UART1
CONFIG_SYS_NS87308_UART1_BASE
CONFIG_SYS_NS87308_UART2
CONFIG_SYS_NS87308_UART2_BASE
CONFIG_SYS_NUM_ADDR_MAP
CONFIG_SYS_NUM_CPC
CONFIG_SYS_NUM_FM1_10GEC
......
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