提交 007056f4 编写于 作者: A Atish Patra 提交者: Andes

cpu: Bind timer driver for boot hart

Currently, timer driver is bound only for hart0.

There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.

The timer driver should be bound for boot hart.
Signed-off-by: NAtish Patra <atish.patra@wdc.com>
Signed-off-by: NAnup Patel <anup.patel@wdc.com>
Reviewed-by: NAlexander Graf <agraf@suse.de>
Reviewed-by: NLukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
上级 ee0633ef
......@@ -10,6 +10,8 @@
#include <dm/device-internal.h>
#include <dm/lists.h>
DECLARE_GLOBAL_DATA_PTR;
static int riscv_cpu_get_desc(struct udevice *dev, char *buf, int size)
{
const char *isa;
......@@ -62,7 +64,6 @@ static int riscv_cpu_bind(struct udevice *dev)
/* save the hart id */
plat->cpu_id = dev_read_addr(dev);
/* first examine the property in current cpu node */
ret = dev_read_u32(dev, "timebase-frequency", &plat->timebase_freq);
/* if not found, then look at the parent /cpus node */
......@@ -71,7 +72,7 @@ static int riscv_cpu_bind(struct udevice *dev)
&plat->timebase_freq);
/*
* Bind riscv-timer driver on hart 0
* Bind riscv-timer driver on boot hart.
*
* We only instantiate one timer device which is enough for U-Boot.
* Pass the "timebase-frequency" value as the driver data for the
......@@ -80,7 +81,7 @@ static int riscv_cpu_bind(struct udevice *dev)
* Return value is not checked since it's possible that the timer
* driver is not included.
*/
if (!plat->cpu_id && plat->timebase_freq) {
if (plat->cpu_id == gd->arch.boot_hart && plat->timebase_freq) {
drv = lists_driver_lookup_name("riscv_timer");
if (!drv) {
debug("Cannot find the timer driver, not included?\n");
......
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