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由 Ibai Erkiaga 提交于
Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: NIbai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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