Need to provide PLL values for all possible input frequencies (19.2, 24,
25, 26MHz). Values provide are also optimized for jitter (needed
especially for PER PLL and DDR PLL).
Signed-off-by: NJames Doublesin <doublesin@ti.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Tested-by: NMugunthan V N <mugunthanvnm@ti.com>