Measurements during HW basic test showed, that the SDRAM timing
has to be optimized. This patch adapted these timings accordingly.
Signed-off-by: NMarco Schmid <marco.schmid@keymile.com>
Signed-off-by: NHolger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>