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    arm: socfpga: Add Cadence QSPI support to config header · 7fb0f596
    Stefan Roese 提交于
    With this driver enabled for SoCFPGA, access to SPI NOR flash is
    supported.
    
    The configuration (page size, timing info) will be taken from the
    DT. See socrates as an example.
    
    This QSPI supports depends on DT. So QSPI is only enabled if
    CONFIG_OF_CONTROL is defined (see socfpga_socrates_defconfig).
    Signed-off-by: NStefan Roese <sr@denx.de>
    Cc: Chin Liang See <clsee@altera.com>
    Cc: Dinh Nguyen <dinguyen@altera.com>
    Cc: Vince Bridgers <vbridger@altera.com>
    Cc: Marek Vasut <marex@denx.de>
    Cc: Pavel Machek <pavel@denx.de>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
    7fb0f596
socfpga_common.h 8.4 KB