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由 Quentin Schulz 提交于
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike the current 0x70 which enables the clock of UART2, SSP1 and SSP2. Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com> Acked-by: NStefan Roese <sr@denx.de>
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