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    clk: sunxi: add PIO bus gate clocks · 444ab356
    Andre Przywara 提交于
    The introduction of the DM pinctrl driver made its probe function enable
    all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
    variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
    So far we didn't describe those clocks in our clock driver.
    As we enable them already in the SPL, the devices happen to work, but
    the clock driver still complains about not finding those clocks:
    =========
    sunxi_set_gate: (CLK#58) unhandled
    =========
    
    Add the one-liners that are needed to announce the gate bit for those
    clocks, to silence that message on the console.
    Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
    Reviewed-by: NSamuel Holland <samuel@sholland.org>
    444ab356
clk_a80.c 3.1 KB