mccmon6.h 7.6 KB
Newer Older
1
/* SPDX-License-Identifier: GPL-2.0+ */
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
/*
 * Copyright (C) 2016-2017
 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "mx6_common.h"

#include "imx6_spl.h"

#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000)
#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000

/*
 * Below defines are set but NOT really used since we by
 * design force U-Boot run when we boot in development
 * mode from SD card (SD2)
 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800)
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80)
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000)
25
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "fitImage"
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

#define CONFIG_MXC_UART_BASE		UART1_BASE

/* MMC Configuration */
#define CONFIG_SYS_FSL_USDHC_NUM	2
#define CONFIG_SYS_FSL_ESDHC_ADDR	0

/* NOR 16-bit mode */
#define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_FLASH_VERIFY

/* NOR Flash MTD */
#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
#define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
#define CONFIG_SYS_FLASH_BANKS_SIZES	{ (32 * SZ_1M) }

/* Ethernet Configuration */
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR		1

#define CONFIG_EXTRA_ENV_SETTINGS \
49
	"console=ttymxc0,115200 quiet\0" \
50 51 52
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"boot_os=yes\0" \
53
	"kernelsize=0x300000\0" \
54
	"disable_giga=yes\0" \
55
	"download_kernel=" \
56
		"tftpboot ${loadaddr} ${kernel_file};\0" \
57 58 59 60 61 62 63
	"get_boot_medium=" \
		"setenv boot_medium nor;" \
		"setexpr.l _src_sbmr1 *0x020d8004;" \
		"setexpr _b_medium ${_src_sbmr1} '&' 0x00000040;" \
		"if test ${_b_medium} = 40; then " \
			"setenv boot_medium sdcard;" \
		"fi\0" \
64
	"kernel_file=fitImage\0" \
65 66 67 68 69 70 71 72 73 74
	"boot_sd=" \
		"echo '#######################';" \
		"echo '# Factory SDcard Boot #';" \
		"echo '#######################';" \
		"setenv mmcdev 1;" \
		"setenv mmcfactorydev 0;" \
		"setenv mmcfactorypart 1;" \
		"run factory_flash_img;\0" \
	"boot_nor=" \
		"setenv kernelnor 0x08180000;" \
75
		"setenv bootargs console=${console} " \
76
		CONFIG_MTDPARTS_DEFAULT " " \
77
		"root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \
78 79
		"cp.l ${kernelnor} ${loadaddr} ${kernelsize};" \
		"bootm ${loadaddr};reset;\0" \
80 81 82 83 84 85 86 87
	"boot_recovery=" \
		"echo '#######################';" \
		"echo '# RECOVERY SWU Boot   #';" \
		"echo '#######################';" \
		"setenv rootfsloadaddr 0x13000000;" \
		"setenv swukernelnor 0x08980000;" \
		"setenv swurootfsnor 0x09180000;" \
		"setenv bootargs console=${console} " \
88
		CONFIG_MTDPARTS_DEFAULT " " \
89 90 91
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
		    ":${hostname}::off root=/dev/ram rw;" \
		"cp.l ${swurootfsnor} ${rootfsloadaddr} 0x200000;" \
92 93
		"cp.l ${swukernelnor} ${loadaddr} ${kernelsize};" \
		"bootm ${loadaddr} ${rootfsloadaddr};reset;\0" \
94 95 96 97 98 99 100
	"boot_tftp=" \
		"echo '#######################';" \
		"echo '# TFTP Boot           #';" \
		"echo '#######################';" \
		"if run download_kernel; then " \
		     "setenv bootargs console=${console} " \
		     "root=/dev/mmcblk0p2 rootwait;" \
101
		     "bootm $loadaddr};reset;" \
102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
		"fi\0" \
	"bootcmd=" \
		"if test -n ${recovery_status}; then " \
		     "run boot_recovery;" \
		"else " \
		     "if test ! -n ${boot_medium}; then " \
			  "run get_boot_medium;" \
			  "if test ${boot_medium} = sdcard; then " \
			      "run boot_sd;" \
			  "else " \
			      "run boot_nor;" \
			  "fi;" \
		     "else " \
			  "if test ${boot_medium} = tftp; then " \
			      "run boot_tftp;" \
			  "fi;" \
		     "fi;" \
		"fi\0" \
120
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150
	"bootdev=1\0" \
	"bootpart=1\0" \
	"netdev=eth0\0" \
	"load_addr=0x11000000\0" \
	"uboot_file=u-boot.img\0" \
	"SPL_file=SPL\0" \
	"load_uboot=tftp ${load_addr} ${uboot_file}\0" \
	"nor_img_addr=0x11000000\0" \
	"nor_img_file=core-image-lwn-mccmon6.nor\0" \
	"emmc_img_file=core-image-lwn-mccmon6.ext4\0" \
	"nor_bank_start=" __stringify(CONFIG_SYS_FLASH_BASE) "\0" \
	"nor_img_size=0x02000000\0" \
	"factory_script_file=factory.scr\0" \
	"factory_load_script=" \
		"if test -e mmc ${mmcdev}:${mmcfactorypart} " \
		    "${factory_script_file}; then " \
		    "load mmc ${mmcdev}:${mmcfactorypart} " \
		     "${loadaddr} ${factory_script_file};" \
		"fi\0" \
	"factory_script=echo Running factory script from mmc${mmcdev} ...; " \
		"source ${loadaddr}\0" \
	"factory_flash_img="\
		"echo 'Flash mccmon6 with factory images'; " \
		"if run factory_load_script; then " \
			"run factory_script;" \
		"else " \
		    "echo No factory script: ${factory_script_file} found on " \
		    "device ${mmcdev};" \
		    "run factory_nor_img;" \
		    "run factory_eMMC_img;" \
151
		    "run factory_SPL_falcon_setup;" \
152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172
		"fi\0" \
	"factory_eMMC_img="\
		"echo 'Update mccmon6 eMMC image'; " \
		"if load mmc ${mmcdev}:${mmcfactorypart} " \
		    "${loadaddr} ${emmc_img_file}; then " \
		    "setexpr fw_sz ${filesize} / 0x200;" \
		    "setexpr fw_sz ${fw_sz} + 1;" \
		    "mmc dev ${mmcfactorydev};" \
		    "mmc write ${loadaddr} 0x0 ${fw_sz};" \
		"fi\0" \
	"factory_nor_img="\
		"echo 'Update mccmon6 NOR image'; " \
		"if load mmc ${mmcdev}:${mmcfactorypart} " \
		    "${nor_img_addr} ${nor_img_file}; then " \
			"run nor_update;" \
		"fi\0" \
	"nor_update=" \
		    "protect off ${nor_bank_start} +${nor_img_size};" \
		    "erase ${nor_bank_start} +${nor_img_size};" \
		    "setexpr nor_img_size ${nor_img_size} / 4; " \
		    "cp.l ${nor_img_addr} ${nor_bank_start} ${nor_img_size}\0" \
173 174 175 176 177 178 179 180 181 182
	"factory_SPL_falcon_setup="\
		"echo 'Write Falcon boot data'; " \
		"setenv kernelnor 0x08180000;" \
		"cp.l ${kernelnor} ${loadaddr} ${kernelsize};" \
		"spl export fdt ${loadaddr};" \
		"setenv nor_img_addr ${fdtargsaddr};" \
		"setenv nor_img_size 0x20000;" \
		"setenv nor_bank_start " \
				__stringify(CONFIG_CMD_SPL_NOR_OFS)";" \
		"run nor_update\0" \
183 184 185 186 187 188 189 190
	"tftp_nor_uboot="\
		"echo 'Update mccmon6 NOR U-BOOT via TFTP'; " \
		"setenv nor_img_file u-boot.img; " \
		"setenv nor_img_size 0x80000; " \
		"setenv nor_bank_start 0x08080000; " \
		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
		    "run nor_update;" \
		"fi\0" \
191 192 193
	"tftp_nor_fitImg="\
		"echo 'Update mccmon6 NOR fitImage via TFTP'; " \
		"setenv nor_img_file fitImage; " \
194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242
		"setenv nor_img_size 0x500000; " \
		"setenv nor_bank_start 0x08180000; " \
		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
		    "run nor_update;" \
		"fi\0" \
	"tftp_nor_img="\
		"echo 'Update mccmon6 NOR image via TFTP'; " \
		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
		    "run nor_update;" \
		"fi\0" \
	"tftp_nor_SPL="\
		"if tftp ${load_addr} SPL_padded; then " \
		    "erase 0x08000000 +0x20000;" \
		    "cp.b ${load_addr} 0x08000000 0x20000;" \
		"fi;\0" \
	"tftp_sd_SPL="\
	    "if mmc dev 1; then "      \
		"if tftp ${load_addr} ${SPL_file}; then " \
		    "setexpr fw_sz ${filesize} / 0x200; " \
		    "setexpr fw_sz ${fw_sz} + 1; " \
		    "mmc write ${load_addr} 0x2 ${fw_sz};" \
		"fi;" \
	    "fi;\0" \
	"tftp_sd_uboot="\
	    "if mmc dev 1; then "      \
		"if run load_uboot; then " \
		    "setexpr fw_sz ${filesize} / 0x200; " \
		    "setexpr fw_sz ${fw_sz} + 1; " \
		    "mmc write ${load_addr} 0x8A ${fw_sz};" \
		"fi;" \
	    "fi;\0"

/* Physical Memory Map */
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Environment organization */

/* Envs are stored in NOR flash */

#endif			       /* __CONFIG_H * */