提交 4e52b984 编写于 作者: A Andy Polyakov

aes-390x.pl: commentary update.

上级 e22b8648
......@@ -35,11 +35,11 @@
#
# Add support for hardware AES192/256 and reschedule instructions to
# minimize/avoid Address Generation Interlock hazard and to favour
# dual-issue z10 pipeline. This gave ~25% improvement on z10. The gain
# should be larger on earlier CPUs, because being dual-issue z10 makes
# it improssible to eliminate the interlock condition, critial path is
# not long enough. Yet z10 spends ~24 cycles per byte processed with
# 128-bit key.
# dual-issue z10 pipeline. This gave ~25% improvement on z10 and
# almost 50% on z9. The gain is smaller on z10, because being dual-
# issue z10 makes it improssible to eliminate the interlock condition:
# critial path is not long enough. Yet it spends ~24 cycles per byte
# processed with 128-bit key.
#
# Unlike previous version hardware support detection takes place only
# at the moment of key schedule setup, which is denoted in key->rounds.
......
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