armv4cpuid.pl 4.0 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14
#!/usr/bin/env perl

$flavour = shift;
$output  = shift;

$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
( $xlate="${dir}perlasm/arm-xlate.pl" and -f $xlate) or
die "can't locate arm-xlate.pl";

open OUT,"| \"$^X\" $xlate $flavour $output";
*STDOUT=*OUT;

$code.=<<___;
15 16 17 18 19
#include "arm_arch.h"

.text
.code	32

20
.align	5
21 22 23 24 25 26 27 28 29 30
.global	OPENSSL_atomic_add
.type	OPENSSL_atomic_add,%function
OPENSSL_atomic_add:
#if __ARM_ARCH__>=6
.Ladd:	ldrex	r2,[r0]
	add	r3,r2,r1
	strex	r2,r3,[r0]
	cmp	r2,#0
	bne	.Ladd
	mov	r0,r3
31
	bx	lr
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
#else
	stmdb	sp!,{r4-r6,lr}
	ldr	r2,.Lspinlock
	adr	r3,.Lspinlock
	mov	r4,r0
	mov	r5,r1
	add	r6,r3,r2	@ &spinlock
	b	.+8
.Lspin:	bl	sched_yield
	mov	r0,#-1
	swp	r0,r0,[r6]
	cmp	r0,#0
	bne	.Lspin

	ldr	r2,[r4]
47
	add	r2,r2,r5
48 49 50 51 52 53 54 55 56 57 58 59 60 61
	str	r2,[r4]
	str	r0,[r6]		@ release spinlock
	ldmia	sp!,{r4-r6,lr}
	tst	lr,#1
	moveq	pc,lr
	.word	0xe12fff1e	@ bx	lr
#endif
.size	OPENSSL_atomic_add,.-OPENSSL_atomic_add

.global	OPENSSL_cleanse
.type	OPENSSL_cleanse,%function
OPENSSL_cleanse:
	eor	ip,ip,ip
	cmp	r1,#7
62
	subhs	r1,r1,#4
63 64 65 66 67
	bhs	.Lot
	cmp	r1,#0
	beq	.Lcleanse_done
.Little:
	strb	ip,[r0],#1
68
	subs	r1,r1,#1
69 70 71 72 73 74
	bhi	.Little
	b	.Lcleanse_done

.Lot:	tst	r0,#3
	beq	.Laligned
	strb	ip,[r0],#1
75
	sub	r1,r1,#1
76 77 78
	b	.Lot
.Laligned:
	str	ip,[r0],#4
79
	subs	r1,r1,#4
80
	bhs	.Laligned
81
	adds	r1,r1,#4
82 83
	bne	.Little
.Lcleanse_done:
84 85 86
#if __ARM_ARCH__>=5
	bx	lr
#else
87 88 89
	tst	lr,#1
	moveq	pc,lr
	.word	0xe12fff1e	@ bx	lr
90
#endif
91 92
.size	OPENSSL_cleanse,.-OPENSSL_cleanse

93 94 95 96 97 98 99 100 101 102 103 104 105 106 107
#if __ARM_MAX_ARCH__>=7
.arch	armv7-a
.fpu	neon

.align	5
.global	_armv7_neon_probe
.type	_armv7_neon_probe,%function
_armv7_neon_probe:
	vorr	q0,q0,q0
	bx	lr
.size	_armv7_neon_probe,.-_armv7_neon_probe

.global	_armv7_tick
.type	_armv7_tick,%function
_armv7_tick:
108 109 110
#ifdef	__APPLE__
	mrrc	p15,0,r0,r1,c14		@ CNTPCT
#else
111
	mrrc	p15,1,r0,r1,c14		@ CNTVCT
112
#endif
113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143
	bx	lr
.size	_armv7_tick,.-_armv7_tick

.global	_armv8_aes_probe
.type	_armv8_aes_probe,%function
_armv8_aes_probe:
	.byte	0x00,0x03,0xb0,0xf3	@ aese.8	q0,q0
	bx	lr
.size	_armv8_aes_probe,.-_armv8_aes_probe

.global	_armv8_sha1_probe
.type	_armv8_sha1_probe,%function
_armv8_sha1_probe:
	.byte	0x40,0x0c,0x00,0xf2	@ sha1c.32	q0,q0,q0
	bx	lr
.size	_armv8_sha1_probe,.-_armv8_sha1_probe

.global	_armv8_sha256_probe
.type	_armv8_sha256_probe,%function
_armv8_sha256_probe:
	.byte	0x40,0x0c,0x00,0xf3	@ sha256h.32	q0,q0,q0
	bx	lr
.size	_armv8_sha256_probe,.-_armv8_sha256_probe
.global	_armv8_pmull_probe
.type	_armv8_pmull_probe,%function
_armv8_pmull_probe:
	.byte	0x00,0x0e,0xa0,0xf2	@ vmull.p64	q0,d0,d0
	bx	lr
.size	_armv8_pmull_probe,.-_armv8_pmull_probe
#endif

144 145 146
.global	OPENSSL_wipe_cpu
.type	OPENSSL_wipe_cpu,%function
OPENSSL_wipe_cpu:
147
#if __ARM_MAX_ARCH__>=7
148 149 150
	ldr	r0,.LOPENSSL_armcap
	adr	r1,.LOPENSSL_armcap
	ldr	r0,[r1,r0]
151 152 153
#ifdef	__APPLE__
	ldr	r0,[r0]
#endif
154
#endif
155 156 157
	eor	r2,r2,r2
	eor	r3,r3,r3
	eor	ip,ip,ip
158
#if __ARM_MAX_ARCH__>=7
159 160
	tst	r0,#1
	beq	.Lwipe_done
161 162 163 164 165 166 167 168 169 170 171 172
	veor	q0, q0, q0
	veor	q1, q1, q1
	veor	q2, q2, q2
	veor	q3, q3, q3
	veor	q8, q8, q8
	veor	q9, q9, q9
	veor	q10, q10, q10
	veor	q11, q11, q11
	veor	q12, q12, q12
	veor	q13, q13, q13
	veor	q14, q14, q14
	veor	q15, q15, q15
173
.Lwipe_done:
174
#endif
175
	mov	r0,sp
176 177 178
#if __ARM_ARCH__>=5
	bx	lr
#else
179 180 181
	tst	lr,#1
	moveq	pc,lr
	.word	0xe12fff1e	@ bx	lr
182
#endif
183 184 185 186 187 188
.size	OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu

.global	OPENSSL_instrument_bus
.type	OPENSSL_instrument_bus,%function
OPENSSL_instrument_bus:
	eor	r0,r0,r0
189 190 191
#if __ARM_ARCH__>=5
	bx	lr
#else
192 193 194
	tst	lr,#1
	moveq	pc,lr
	.word	0xe12fff1e	@ bx	lr
195
#endif
196 197 198 199 200 201
.size	OPENSSL_instrument_bus,.-OPENSSL_instrument_bus

.global	OPENSSL_instrument_bus2
.type	OPENSSL_instrument_bus2,%function
OPENSSL_instrument_bus2:
	eor	r0,r0,r0
202 203 204
#if __ARM_ARCH__>=5
	bx	lr
#else
205 206 207
	tst	lr,#1
	moveq	pc,lr
	.word	0xe12fff1e	@ bx	lr
208
#endif
209 210 211
.size	OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2

.align	5
212
#if __ARM_MAX_ARCH__>=7
213
.LOPENSSL_armcap:
214
.word	OPENSSL_armcap_P-.
215
#endif
216 217 218 219 220 221 222 223 224 225 226 227 228 229 230
#if __ARM_ARCH__>=6
.align	5
#else
.Lspinlock:
.word	atomic_add_spinlock-.Lspinlock
.align	5

.data
.align	2
atomic_add_spinlock:
.word	0
#endif

.comm	OPENSSL_armcap_P,4,4
.hidden	OPENSSL_armcap_P
231 232 233 234
___

print $code;
close STDOUT;