1. 09 9月, 2020 1 次提交
  2. 15 6月, 2019 1 次提交
    • R
      add riscv64 architecture support · 0a48860c
      Rich Felker 提交于
      Author: Alex Suykov <alex.suykov@gmail.com>
      Author: Aric Belsito <lluixhi@gmail.com>
      Author: Drew DeVault <sir@cmpwn.com>
      Author: Michael Clark <mjc@sifive.com>
      Author: Michael Forney <mforney@mforney.org>
      Author: Stefan O'Rear <sorear2@gmail.com>
      
      This port has involved the work of many people over several years. I
      have tried to ensure that everyone with substantial contributions has
      been credited above; if any omissions are found they will be noted
      later in an update to the authors/contributors list in the COPYRIGHT
      file.
      
      The version committed here comes from the riscv/riscv-musl repo's
      commit 3fe7e2c75df78eef42dcdc352a55757729f451e2, with minor changes by
      me for issues found during final review:
      
      - a_ll/a_sc atomics are removed (according to the ISA spec, lr/sc
        are not safe to use in separate inline asm fragments)
      
      - a_cas[_p] is fixed to be a memory barrier
      
      - the call from the _start assembly into the C part of crt1/ldso is
        changed to allow for the possibility that the linker does not place
        them nearby each other.
      
      - DTP_OFFSET is defined correctly so that local-dynamic TLS works
      
      - reloc.h LDSO_ARCH logic is simplified and made explicit.
      
      - unused, non-functional crti/n asm files are removed.
      
      - an empty .sdata section is added to crt1 so that the
        __global_pointer reference is resolvable.
      
      - indentation style errors in some asm files are fixed.
      0a48860c