1. 16 7月, 2019 1 次提交
    • R
      fix build failure on arm building C code in thumb1 mode · 980f80f7
      Rich Felker 提交于
      a fully thumb1 build is not supported because some asm files are
      incompatible with thumb1, but apparently it works to compile the C
      code as thumb1
      
      commit 06fbefd1 caused this regression
      but introducing use of the clz instruction, which is not supported in
      arm mode prior to v5, and not supported in thumb prior to thumb2
      (v6t2). commit 1b9406b0 fixed the
      issue only for arm mode pre-v5 but left thumb1 broken.
      980f80f7
  2. 11 7月, 2019 1 次提交
  3. 05 7月, 2019 1 次提交
  4. 02 7月, 2019 3 次提交
    • S
      add new syscall numbers from linux v5.1 · f3f96f2d
      Szabolcs Nagy 提交于
      syscall numbers are now synced up across targets (starting from 403 the
      numbers are the same on all targets other than an arch specific offset)
      
      IPC syscalls sem*, shm*, msg* got added where they were missing (except
      for semop: only semtimedop got added), the new semctl, shmctl, msgctl
      imply IPC_64, see
      
        linux commit 0d6040d4681735dfc47565de288525de405a5c99
        arch: add split IPC system calls where needed
      
      new 64bit time_t syscall variants got added on 32bit targets, see
      
        linux commit 48166e6ea47d23984f0b481ca199250e1ce0730a
        y2038: add 64-bit time_t syscalls to all 32-bit architectures
      
      new async io syscalls got added, see
      
        linux commit 2b188cc1bb857a9d4701ae59aa7768b5124e262e
        Add io_uring IO interface
      
        linux commit edafccee56ff31678a091ddb7219aba9b28bc3cb
        io_uring: add support for pre-mapped user IO buffers
      
      a new syscall got added that uses the fd of /proc/<pid> as a stable
      handle for processes: allows sending signals without pid reuse issues,
      intended to eventually replace rt_sigqueueinfo, kill, tgkill and
      rt_tgsigqueueinfo, see
      
        linux commit 3eb39f47934f9d5a3027fe00d906a45fe3a15fad
        signal: add pidfd_send_signal() syscall
      
      on some targets (arm, m68k, s390x, sh) some previously missing syscall
      numbers got added as well.
      f3f96f2d
    • S
      mips64: fix syscall numbers of io_pgetevents and rseq · b574de5b
      Szabolcs Nagy 提交于
      the numbers added in
      
        commit d149e69c
        add io_pgetevents and rseq syscall numbers from linux v4.18
      
      were incorrect.
      b574de5b
    • S
      s390x: drop SO_ definitions from bits/socket.h · 45235051
      Szabolcs Nagy 提交于
      the s390x definitions matched the generic ones in sys/socket.h.
      45235051
  5. 15 6月, 2019 1 次提交
    • R
      add riscv64 architecture support · 0a48860c
      Rich Felker 提交于
      Author: Alex Suykov <alex.suykov@gmail.com>
      Author: Aric Belsito <lluixhi@gmail.com>
      Author: Drew DeVault <sir@cmpwn.com>
      Author: Michael Clark <mjc@sifive.com>
      Author: Michael Forney <mforney@mforney.org>
      Author: Stefan O'Rear <sorear2@gmail.com>
      
      This port has involved the work of many people over several years. I
      have tried to ensure that everyone with substantial contributions has
      been credited above; if any omissions are found they will be noted
      later in an update to the authors/contributors list in the COPYRIGHT
      file.
      
      The version committed here comes from the riscv/riscv-musl repo's
      commit 3fe7e2c75df78eef42dcdc352a55757729f451e2, with minor changes by
      me for issues found during final review:
      
      - a_ll/a_sc atomics are removed (according to the ISA spec, lr/sc
        are not safe to use in separate inline asm fragments)
      
      - a_cas[_p] is fixed to be a memory barrier
      
      - the call from the _start assembly into the C part of crt1/ldso is
        changed to allow for the possibility that the linker does not place
        them nearby each other.
      
      - DTP_OFFSET is defined correctly so that local-dynamic TLS works
      
      - reloc.h LDSO_ARCH logic is simplified and made explicit.
      
      - unused, non-functional crti/n asm files are removed.
      
      - an empty .sdata section is added to crt1 so that the
        __global_pointer reference is resolvable.
      
      - indentation style errors in some asm files are fixed.
      0a48860c
  6. 23 5月, 2019 2 次提交
    • R
      make powerpc64 vrregset_t logical layout match expected API · ac304227
      Rich Felker 提交于
      between v2 and v3 of the powerpc64 port patch, the change was made
      from a 32x4 array of 32-bit unsigned ints for vrregs[] to a 32-element
      array of __int128. this mismatches the API applications working with
      mcontext_t expect from glibc, and seems to have been motivated by a
      misinterpretation of a comment on how aarch64 did things as a
      suggestion to do the same on powerpc64.
      ac304227
    • R
      fix vrregset_t layout and member naming on powerpc64 · 3c59a868
      Rich Felker 提交于
      the mistaken layout seems to have been adapted from 32-bit powerpc,
      where vscr and vrsave are packed into the same 128-bit slot in a way
      that looks like it relies on non-overlapping-ness of the value bits in
      big endian.
      
      the powerpc64 port accounted for the fact that the 64-bit ABI puts
      each in its own 128-bit slot, but ordered them incorrectly (matching
      the bit order used on the 32-bit ABI), and failed to account for vscr
      being padded according to endianness so that it can be accessed via
      vector moves.
      
      in addition to ABI layout, our definition used different logical
      member layout/naming from glibc, where vscr is a structure to
      facilitate access as a 32-bit word or a 128-bit vector. the
      inconsistency here was unintentional, so fix it.
      3c59a868
  7. 12 5月, 2019 1 次提交
    • R
      improve i386 inline syscall asm on non-broken compilers · bdb08175
      Rich Felker 提交于
      we have to avoid using ebx unconditionally in asm constraints for
      i386, because gcc 3 and 4 and possibly other simplistic compilers
      (pcc?) implement PIC via making ebx a fixed-use register, and disallow
      its use for anything else. rather than hard-coding knowledge of which
      compilers work (at least gcc 5+ and clang), perform a configure test;
      this should give us the good codegen on any new compilers we don't yet
      know about.
      
      swapping ebx and edx is kept for 1- and 2-arg syscalls because it
      avoids having any spills/stack-frame at all in small functions. for
      6-arg, if ebx is directly usable, the complex shuffling introduced in
      commit c8798ef9 can be avoided, and
      ebp can be loaded the same way ebx is in 5-arg syscalls for compilers
      that don't support direct use of ebx.
      bdb08175
  8. 11 5月, 2019 1 次提交
    • R
      fix regression in i386 inline syscall asm producing invalid code · c8798ef9
      Rich Felker 提交于
      commit 22e5bbd0 inlined the i386
      syscall mechanism, but wrongly assumed memory operands to the 5- and
      6-argument syscall asm would be esp-based. however, nothing in the
      constraints prevented them from being ebx- or ebp-based, and in those
      cases, ebx and ebp could be clobbered before use of the memory operand
      was complete. in the 6-argument case, this prevented restoration of
      the original register values before the end of the asm block, breaking
      the asm contract since ebx and ebp are not marked as clobbered. (they
      can't be, because lots of compilers don't accept these registers in
      constraints or clobbers if PIC or frame pointer is enabled).
      
      doing this right is complicated by the fact that, after a single push,
      no operands which might be memory operands are usable. if they are
      esp-based, the value of esp has changed, rendering them invalid.
      
      introduce some new dances to load the registers. for the 5-arg case,
      push the operand that may be a memory operand first, and after that,
      it doesn't matter if the operand is invalid, since we'll just use the
      newly pushed value. for the 6-arg case, we need to put both operands
      in memory to begin with, like the old non-inline code prior to commit
      22e5bbd0 accepted, so that there's
      only one potentially memory-based operand to the asm. this can then be
      saved with a single push, and after that the values can be read off
      into the registers they're needed in.
      
      there's some size overhead, but still a lot less execution overhead
      than the old out-of-line code. doing it better depends on a modern
      compiler that lets you use ebx and ebp in asm constraints without
      restriction. the failure modes on compilers where this doesn't work
      are inconsistent and dangerous (on at least some gcc versions 4.x and
      earlier, wrong codegen!), so this is a delicate matter. it can be
      addressed later if needed.
      c8798ef9
  9. 05 5月, 2019 3 次提交
    • R
      fix broken posix_fadvise on mips due to missing 7-arg syscall support · d02e72ad
      Rich Felker 提交于
      commit 788d5e24 exposed the breakage
      at build time by removing support for 7-argument syscalls; however,
      the external __syscall function provided for mips before did not pass
      a 7th argument from the stack, so the behavior was just silently
      broken.
      d02e72ad
    • R
      fix build regression on mips n32 due to typo in new inline syscall · 7b6ec3de
      Rich Felker 提交于
      commit 1bcdaeee introduced the
      regression.
      7b6ec3de
    • R
      fix passing of 64-bit syscall arguments on microblaze · 28198ac3
      Rich Felker 提交于
      this has been wrong since the beginning of the microblaze port: the
      syscall ABI for microblaze does not align 64-bit arguments on even
      register boundaries. commit 788d5e24
      exposed the problem by introducing references to a nonexistent
      __syscall7. the ABI is not documented well anywhere, but I was able to
      confirm against both strace source and glibc source that microblaze is
      not using the alignment.
      
      per the syscall(2) man page, posix_fadvise, ftruncate, pread, pwrite,
      readahead, sync_file_range, and truncate were all affected and either
      did not work at all, or only worked by chance, e.g. when the affected
      argument slots were all zero.
      28198ac3
  10. 24 4月, 2019 1 次提交
  11. 18 4月, 2019 1 次提交
    • S
      math: add fp_arch.h with fp_barrier and fp_force_eval · b50d315f
      Szabolcs Nagy 提交于
      C99 has ways to support fenv access, but compilers don't implement it
      and assume nearest rounding mode and no fp status flag access. (gcc has
      -frounding-math and then it does not assume nearest rounding mode, but
      it still assumes the compiled code itself does not change the mode.
      Even if the C99 mechanism was implemented it is not ideal: it requires
      all code in the library to be compiled with FENV_ACCESS "on" to make it
      usable in non-nearest rounding mode, but that limits optimizations more
      than necessary.)
      
      The math functions should give reasonable results in all rounding modes
      (but the quality may be degraded in non-nearest rounding modes) and the
      fp status flag settings should follow the spec, so fenv side-effects are
      important and code transformations that break them should be prevented.
      
      Unfortunately compilers don't give any help with this, the best we can
      do is to add fp barriers to the code using volatile local variables
      (they create a stack frame and undesirable memory accesses to it) or
      inline asm (gcc specific, requires target specific fp reg constraints,
      often creates unnecessary reg moves and multiple barriers are needed to
      express that an operation has side-effects) or extern call (only useful
      in tail-call position to avoid stack-frame creation and does not work
      with lto).
      
      We assume that in a math function if an operation depends on the input
      and the output depends on it, then the operation will be evaluated at
      runtime when the function is called, producing all the expected fenv
      side-effects (this is not true in case of lto and in case the operation
      is evaluated with excess precision that is not rounded away). So fp
      barriers are needed (1) to prevent the move of an operation within a
      function (in case it may be moved from an unevaluated code path into an
      evaluated one or if it may be moved across a fenv access), (2) force the
      evaluation of an operation for its side-effect when it has no input
      dependency (may be constant folded) or (3) when its output is unused. I
      belive that fp_barrier and fp_force_eval can take care of these and they
      should not be needed in hot code paths.
      b50d315f
  12. 11 4月, 2019 6 次提交
    • R
      implement inline 5- and 6-argument syscalls for mipsn32 and mips64 · 1bcdaeee
      Rich Felker 提交于
      n32 and n64 ABIs add new argument registers vs o32, so that passing on
      the stack is not necessary, so it's not clear why the 5- and
      6-argument versions were special-cased to begin with; it seems to have
      been pattern-copying from arch/mips (o32).
      
      i've treated the new argument registers like the first 4 in terms of
      clobber status (non-clobbered). hopefully this is correct.
      1bcdaeee
    • R
      cleanup mips64 syscall_arch functions · d3b4869c
      Rich Felker 提交于
      d3b4869c
    • R
      implement inline 5- and 6-argument syscalls for mips · dcb18bea
      Rich Felker 提交于
      the OABI passes these on the stack, using the convention that their
      position on the stack is as if the first four arguments (in registers)
      also had stack slots. originally this was deemed too awkward to do
      inline, falling back to external __syscall, but it's not that bad and
      now that external __syscall is being removed, it's necessary.
      dcb18bea
    • R
      use inline syscalls for powerpc (32-bit) · 6aeb9c67
      Rich Felker 提交于
      the inline syscall code is copied directly from powerpc64. the extent
      of register clobber specifiers may be excessive on both; if that turns
      out to be the case it can be fixed later.
      6aeb9c67
    • R
      remove cruft for supposedly-buggy clang from or1k & microblaze syscall_arch · f76d51a1
      Rich Felker 提交于
      it was never demonstrated to me that this workaround was needed, and
      seems likely that, if there ever was any clang version for which it
      was needed, it's old enough to be unusably buggy in other ways. if it
      turns out some compilers actually can't do the register allocation
      right, we'll need to replace this with inline shuffling code, since
      the external __syscall dependency is being removed.
      f76d51a1
    • R
      overhaul i386 syscall mechanism not to depend on external asm source · 22e5bbd0
      Rich Felker 提交于
      this is the first part of a series of patches intended to make
      __syscall fully self-contained in the object file produced using
      syscall.h, which will make it possible for crt1 code to perform
      syscalls.
      
      the (confusingly named) i386 __vsyscall mechanism, which this commit
      removes, was introduced before the presence of a valid thread pointer
      was mandatory; back then the thread pointer was setup lazily only if
      threads were used. the intent was to be able to perform syscalls using
      the kernel's fast entry point in the VDSO, which can use the sysenter
      (Intel) or syscall (AMD) instruction instead of int $128, but without
      inlining an access to the __syscall global at the point of each
      syscall, which would incur a significant size cost from PIC setup
      everywhere. the mechanism also shuffled registers/calling convention
      around to avoid spills of call-saved registers, and to avoid
      allocating ebx or ebp via asm constraints, since there are plenty of
      broken-but-supported compiler versions which are incapable of
      allocating ebx with -fPIC or ebp with -fno-omit-frame-pointer.
      
      the new mechanism preserves the properties of avoiding spills and
      avoiding allocation of ebx/ebp in constraints, but does it inline,
      using some fairly simple register shuffling, and uses a field of the
      thread structure rather than global data for the vdso-provided syscall
      code address.
      
      for now, the external __syscall function is refactored not to use the
      old __vsyscall so it can be kept, but the intent is to remove it too.
      22e5bbd0
  13. 14 3月, 2019 7 次提交
  14. 13 3月, 2019 1 次提交
    • J
      fix POSIX_FADV_DONTNEED/_NOREUSE on s390x · 4b125dd4
      Jonathan Neuschäfer 提交于
      On s390x, POSIX_FADV_DONTNEED and POSIX_FADV_NOREUSE have different
      values than on all other architectures that Linux supports.
      
      Handle this difference by wrapping their definitions in
      include/fcntl.h in #ifdef, so that arch/s390x/bits/fcntl.h can
      override them.
      4b125dd4
  15. 08 2月, 2019 1 次提交
  16. 10 12月, 2018 1 次提交
  17. 17 10月, 2018 2 次提交
  18. 02 10月, 2018 1 次提交
    • R
      add TLSDESC support for 32-bit arm · 0beb9dfb
      Rich Felker 提交于
      unlike other asm where the baseline ISA is used, these functions are
      hot paths and use ISA-level specializations.
      
      call-clobbered vfp registers are saved before calling __tls_get_new,
      since there is no guarantee it won't use them. while setjmp/longjmp
      have to use hwcap to decide whether to the fpu is in use, since
      application code could be using vfp registers even if libc was
      compiled as pure softfloat, __tls_get_new is part of libc and can be
      assumed not to have access to vfp registers if tlsdesc.S does not.
      thus it suffices just to check the predefined preprocessor macros. the
      check for __ARM_PCS_VFP is redundant; !__SOFTFP__ must always be true
      if the target ISA level includes fpu instructions/registers.
      0beb9dfb
  19. 21 9月, 2018 1 次提交
  20. 14 9月, 2018 1 次提交
    • R
      fix broken atomic store on powerpc[64] · 12817793
      Rich Felker 提交于
      in our memory model, all atomics are supposed to be full barriers;
      stores are not release-only. this is important because store is used
      as an unlock operation in places where it needs to acquire the waiter
      count to determine if a futex wake is needed. at least in the
      malloc-internal locks, but possibly elsewhere, soft deadlocks from
      missing futex wake (breakable by poking the threads to restart the
      syscall, e.g. by attaching a tracer) were reported to occur.
      
      once the malloc lock is replaced with Jens Gustedt's new lock
      implementation (see commit 47d0bcd4),
      malloc will not be affected by the issue, but it's not clear that
      other uses won't be. reducing the strength of the ordering properties
      required from a_store would require a thorough analysis of how it's
      used.
      
      to fix the problem, I'm removing the powerpc[64]-specific a_store
      definition; now, the top-level atomic.h will implement a_store using
      a_barrier on both sides of the store.
      
      it's not clear to me yet whether there might be issues with the other
      atomics. it's possible that a_post_llsc needs to be replaced with a
      full barrier to guarantee the formal semanics we want, but either way
      I think the difference is unlikely to impact the way we use them.
      12817793
  21. 13 9月, 2018 1 次提交
    • R
      apply hidden visibility to sigreturn code fragments · b6e59cd9
      Rich Felker 提交于
      these were overlooked in the declarations overhaul work because they
      are not properly declared, and the current framework even allows their
      declared types to vary by arch. at some point this should be cleaned
      up, but I'm not sure what the right way would be.
      b6e59cd9
  22. 06 9月, 2018 1 次提交
    • R
      define and use internal macros for hidden visibility, weak refs · 9b95fd09
      Rich Felker 提交于
      this cleans up what had become widespread direct inline use of "GNU C"
      style attributes directly in the source, and lowers the barrier to
      increased use of hidden visibility, which will be useful to recovering
      some of the efficiency lost when the protected visibility hack was
      dropped in commit dc2f368e, especially
      on archs where the PLT ABI is costly.
      9b95fd09
  23. 30 8月, 2018 1 次提交
    • R
      fix async thread cancellation on sh-fdpic · 35cd7c09
      Rich Felker 提交于
      if __cp_cancel was reached via __syscall_cp, r12 will necessarily
      still contain a GOT pointer (for libc.so or for the static-linked main
      program) valid for entering __cancel. however, in the case of async
      cancellation, r12 may contain any scratch value; it's not necessarily
      even a valid GOT pointer for the code that was interrupted.
      
      unlike in commit 0ec49dab where the
      corresponding issue was fixed for powerpc64, there is fundamentally no
      way for fdpic code to recompute its GOT pointer. so a new mechanism is
      introduced for cancel_handler to write a GOT register value into the
      interrupted context on archs where it is needed.
      35cd7c09