fix:pendsv trigger for cortex-m SOC:some cpu will not enter pendsv when set...

fix:pendsv trigger for cortex-m SOC:some cpu will not enter pendsv when set the flag,and we need dsb and isb to fix this

kernel/arch/arm/cortex-m3/keil/los_dispatch.S

@@ -111,6 +111,8 @@ HalTaskSchedule
     LDR     R0, =OS_NVIC_INT_CTRL
     LDR     R1, =OS_NVIC_PENDSVSET
     STR     R1, [R0]
+    DSB
+    ISB
     BX      LR
 
 HalPendSV

kernel/arch/arm/cortex-m33/gcc/los_dispatch.S

@@ -142,6 +142,8 @@ HalTaskSchedule:
     ldr     r0, =OS_NVIC_INT_CTRL
     ldr     r1, =OS_NVIC_PENDSVSET
     str     r1, [r0]
+    dsb
+    isb
     bx      lr
    .fnend
 

kernel/arch/arm/cortex-m4/gcc/los_dispatch.S

@@ -145,6 +145,8 @@ HalTaskSchedule:
     ldr     r1, =OS_NVIC_PENDSVSET
     str     r1, [r0]
     bx      lr
+    dsb
+    isb
    .fnend
 
 

kernel/arch/arm/cortex-m4/iar/los_dispatch.S

@@ -124,6 +124,8 @@ HalTaskSchedule
     LDR     R0, =OS_NVIC_INT_CTRL
     LDR     R1, =OS_NVIC_PENDSVSET
     STR     R1, [R0]
+    DSB
+    ISB
     BX      LR
 
 HalPendSV

kernel/arch/arm/cortex-m7/gcc/los_dispatch.S

@@ -142,6 +142,8 @@ HalTaskSchedule:
     ldr     r0, =OS_NVIC_INT_CTRL
     ldr     r1, =OS_NVIC_PENDSVSET
     str     r1, [r0]
+    dsb
+    isb
     bx      lr
    .fnend
 

kernel/arch/arm/cortex-m7/iar/los_dispatch.S

@@ -124,6 +124,8 @@ HalTaskSchedule
     LDR     R0, =OS_NVIC_INT_CTRL
     LDR     R1, =OS_NVIC_PENDSVSET
     STR     R1, [R0]
+    DSB
+    ISB
     BX      LR
 
 HalPendSV