1. 29 5月, 2014 1 次提交
    • A
      PCI: Introduce new device binding path using pci_dev.driver_override · 782a985d
      Alex Williamson 提交于
      The driver_override field allows us to specify the driver for a device
      rather than relying on the driver to provide a positive match of the
      device.  This shortcuts the existing process of looking up the vendor and
      device ID, adding them to the driver new_id, binding the device, then
      removing the ID, but it also provides a couple advantages.
      
      First, the above existing process allows the driver to bind to any device
      matching the new_id for the window where it's enabled.  This is often not
      desired, such as the case of trying to bind a single device to a meta
      driver like pci-stub or vfio-pci.  Using driver_override we can do this
      deterministically using:
      
        echo pci-stub > /sys/bus/pci/devices/0000:03:00.0/driver_override
        echo 0000:03:00.0 > /sys/bus/pci/devices/0000:03:00.0/driver/unbind
        echo 0000:03:00.0 > /sys/bus/pci/drivers_probe
      
      Previously we could not invoke drivers_probe after adding a device to
      new_id for a driver as we get non-deterministic behavior whether the driver
      we intend or the standard driver will claim the device.  Now it becomes a
      deterministic process, only the driver matching driver_override will probe
      the device.
      
      To return the device to the standard driver, we simply clear the
      driver_override and reprobe the device:
      
        echo > /sys/bus/pci/devices/0000:03:00.0/driver_override
        echo 0000:03:00.0 > /sys/bus/pci/devices/0000:03:00.0/driver/unbind
        echo 0000:03:00.0 > /sys/bus/pci/drivers_probe
      
      Another advantage to this approach is that we can specify a driver override
      to force a specific binding or prevent any binding.  For instance when an
      IOMMU group is exposed to userspace through VFIO we require that all
      devices within that group are owned by VFIO.  However, devices can be
      hot-added into an IOMMU group, in which case we want to prevent the device
      from binding to any driver (override driver = "none") or perhaps have it
      automatically bind to vfio-pci.  With driver_override it's a simple matter
      for this field to be set internally when the device is first discovered to
      prevent driver matches.
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NAlexander Graf <agraf@suse.de>
      Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      782a985d
  2. 28 5月, 2014 4 次提交
  3. 23 5月, 2014 1 次提交
  4. 01 5月, 2014 1 次提交
    • A
      PCI/MSI: Remove pci_enable_msi_block() · 034cd97e
      Alexander Gordeev 提交于
      There are no users of pci_enable_msi_block() function left.  Obsolete it in
      favor of pci_enable_msi_range() and pci_enable_msi_exact() functions.
      
      Previously, we called arch_setup_msi_irqs() once, requesting the same
      vector count we passed to arch_msi_check_device().  Now we may call it
      several times: if it returns failure, we may retry and request fewer
      vectors.
      
      We don't keep track of the vector count we initially passed to
      arch_msi_check_device().  We only keep track of the number of vectors
      successfully set up by arch_setup_msi_irqs(), and this is what we use to
      clean things up when disabling MSI.  Therefore, we assume that
      arch_msi_check_device() does nothing that will have to be cleaned up later.
      
      [bhelgaas: changelog]
      Signed-off-by: NAlexander Gordeev <agordeev@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      034cd97e
  5. 25 4月, 2014 1 次提交
  6. 20 3月, 2014 1 次提交
  7. 20 2月, 2014 1 次提交
  8. 15 2月, 2014 1 次提交
  9. 14 2月, 2014 2 次提交
  10. 12 2月, 2014 2 次提交
  11. 15 1月, 2014 1 次提交
    • A
      PCI: Add pci_try_reset_function(), pci_try_reset_slot(), pci_try_reset_bus() · 61cf16d8
      Alex Williamson 提交于
      When doing a function/slot/bus reset PCI grabs the device_lock for each
      device to block things like suspend and driver probes, but call paths exist
      where this lock may already be held.  This creates an opportunity for
      deadlock.  For instance, vfio allows userspace to issue resets so long as
      it owns the device(s).  If a driver unbind .remove callback races with
      userspace issuing a reset, we have a deadlock as userspace gets stuck
      waiting on device_lock while another thread has device_lock and waits for
      .remove to complete.  To resolve this, we can make a version of the reset
      interfaces which use trylock.  With this, we can safely attempt a reset and
      return error to userspace if there is contention.
      
      [bhelgaas: the deadlock happens when A (userspace) has a file descriptor for
      the device, and B waits in this path:
      
        driver_detach
          device_lock                     # take device_lock
          __device_release_driver
            pci_device_remove             # pci_bus_type.remove
              vfio_pci_remove             # pci_driver .remove
                vfio_del_group_dev
                  wait_event(vfio.release_q, !vfio_dev_present)   # wait (holding device_lock)
      
      Now B is stuck until A gives up the file descriptor.  If A tries to acquire
      device_lock for any reason, we deadlock because A is waiting for B to release
      the lock, and B is waiting for A to release the file descriptor.]
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      61cf16d8
  12. 14 1月, 2014 8 次提交
  13. 11 1月, 2014 3 次提交
  14. 08 1月, 2014 1 次提交
    • Y
      PCI: Enforce bus address limits in resource allocation · f75b99d5
      Yinghai Lu 提交于
      When allocating space for 32-bit BARs, we previously limited RESOURCE
      addresses so they would fit in 32 bits.  However, the BUS address need not
      be the same as the resource address, and it's the bus address that must fit
      in the 32-bit BAR.
      
      This patch adds:
      
        - pci_clip_resource_to_region(), which clips a resource so it contains
          only the range that maps to the specified bus address region, e.g., to
          clip a resource to 32-bit bus addresses, and
      
        - pci_bus_alloc_from_region(), which allocates space for a resource from
          the specified bus address region,
      
      and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from
      the entire bus address region, and space for 32-bit BARs from only the bus
      address region below 4GB.
      
      If we had this window:
      
        pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff])
      
      we previously could not put a 32-bit BAR there, because the CPU addresses
      don't fit in 32 bits.  This patch fixes this, so we can use this space for
      32-bit BARs.
      
      It's also possible (though unlikely) to have resources with 32-bit CPU
      addresses but bus addresses above 4GB.  In this case the previous code
      would allocate space that a 32-bit BAR could not map.
      
      Remove PCIBIOS_MAX_MEM_32, which is no longer used.
      
      [bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      f75b99d5
  15. 04 1月, 2014 4 次提交
  16. 22 12月, 2013 2 次提交
    • B
      PCI: Add pci_bus_address() to get bus address of a BAR · 06cf56e4
      Bjorn Helgaas 提交于
      We store BAR information as a struct resource, which contains the CPU
      address, not the bus address.  Drivers often need the bus address, and
      there's currently no convenient way to get it, so they often read the
      BAR directly, or use the resource address (which doesn't work if there's
      any translation between CPU and bus addresses).
      
      Add pci_bus_address() to make this convenient.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      06cf56e4
    • Y
      PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev · fc279850
      Yinghai Lu 提交于
      These interfaces:
      
        pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource)
        pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region)
      
      took a pci_dev, but they really depend only on the pci_bus.  And we want to
      use them in resource allocation paths where we have the bus but not a
      device, so this patch converts them to take the pci_bus instead of the
      pci_dev:
      
        pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource)
        pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region)
      
      In fact, with standard PCI-PCI bridges, they only depend on the host
      bridge, because that's the only place address translation occurs, but
      we aren't going that far yet.
      
      [bhelgaas: changelog]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      fc279850
  17. 21 12月, 2013 3 次提交
  18. 20 12月, 2013 1 次提交
  19. 18 12月, 2013 2 次提交
    • A
      PCI: Add Virtual Channel to save/restore support · 425c1b22
      Alex Williamson 提交于
      While we don't really have any infrastructure for making use of VC
      support, the system BIOS can configure the topology to non-default
      VC values prior to boot.  This may be due to silicon bugs, desire to
      reserve traffic classes, or perhaps just BIOS bugs.  When we reset
      devices, the VC configuration may return to default values, which can
      be incompatible with devices upstream.  For instance, Nvidia GRID
      cards provide a PCIe switch and some number of GPUs, all supporting
      VC.  The power-on default for VC is to support TC0-7 across VC0,
      however some platforms will only enable TC0/VC0 mapping across the
      topology.  When we do a secondary bus reset on the downstream switch
      port, the GPU is reset to a TC0-7/VC0 mapping while the opposite end
      of the link only enables TC0/VC0.  If the GPU attempts to use TC1-7,
      it fails.
      
      This patch attempts to provide complete support for VC save/restore,
      even beyond the minimally required use case above.  This includes
      save/restore and reload of the arbitration table, save/restore and
      reload of the port arbitration tables, and re-enabling of the
      channels for VC, VC9, and MFVC capabilities.
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      425c1b22
    • A
      PCI: Add support for save/restore of extended capabilities · fd0f7f73
      Alex Williamson 提交于
      Current save/restore is specific to standard capabilities.
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      fd0f7f73