This kills off the ancient p3_ioremap(), converting over to the more
generic ioremap_prot() instead.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This is already taken care of in the top-level ioremap, and now that
no one should be calling ioremap_fixed() directly we can simply throw the
mapping displacement in as an additional argument.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently 'flags' gets passed around a lot between the various ioremap
helpers and implementations, which is only 32-bits. In the X2TLB case
we use 64-bit pgprots which presently results in the upper 32bits being
chopped off (which handily include our read/write/exec permissions).

As such, we convert everything internally to using pgprot_t directly and
simply convert over with pgprot_val() where needed. With this in place,
transparent fixmap utilization for early ioremap works as expected.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The mem_init_done test makes sure that this path is only entered in
__init cases, so leaving ioremap_fixed() as __init and flagging the
caller __init_refok is sufficient.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

iounmap() should balance whatever is done by ioremap(). Presently
ioremap() can do any of fixed mappings, PMB mappings, or page table
mappings. Presently only the latter two are handled through the standard
unmap path, so tie in the fixed unmapping, too.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This converts iounmap_fixed() to return success/error if it handled the
unmap request or not. At the same time, drop the __init label, as this
can be called in to later.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

There is nothing of interest in the _64 version anymore, so the _32 one
can be renamed and used unconditionally.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently the fixed ioremap API is only defined when CONFIG_IOREMAP_FIXED
is set. As we want to call in to it unconditionally, provide a stubbed
out interface.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This tosses in a local_irq_enable()/disable() pair around the init_fpu()
callsite in the FPU state restore exception handler. Fixes up a slab BUG
triggered by making a slab cache allocation that can sleep whilst
irqs_disabled(). This follows the behaviour undertaken by the x86
implementation.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

More and more boards are going to start shipping that boot with the MMU
in 32BIT mode by default. Previously we relied on the bootloader to
setup PMB mappings for use by the kernel but we also need to cater for
boards whose bootloaders don't set them up.

If CONFIG_PMB_LEGACY is not enabled we have full control over our PMB
mappings and can compress our address space. Usually, the distance
between the the cached and uncached mappings of RAM is always 512MB,
however we can compress the distance to be the amount of RAM on the
board.

pmb_init() now becomes much simpler. It no longer has to calculate any
mappings, it just has to synchronise the software PMB table with the
hardware.

Tested on SDK7786 and SH7785LCR.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This tidies up the iounmap path with consolidated checks for
nontranslatable mappings. This is in preparation of unifying
the implementations.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Use the fixmap-based memory mapping implementation for SH-5's ioremap()
functions and delete the old static allocator that was borrowed from
sparc.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

We need to write to the DRAM config register very early and at such an
early stage ioremap() is not available. So use ioremap_fixed() to map
the register.

The reason that we are avoiding using the legacy P2 mapping is that
there will come a day when the legacy P2 mappings no longer exist.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

Some devices need to be ioremap'd and accessed very early in the boot
process. It is not possible to use the standard ioremap() function in
this case because that requires kmalloc()'ing some virtual address space
and kmalloc() may not be available so early in boot.

This patch provides fixmap mappings that allow physical address ranges
to be remapped into the kernel address space during the early boot
stages.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

Generalise the code for setting and clearing pte's and allow TLB entries
to be pinned and unpinned if the _PAGE_WIRED flag is present.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

We need some more page flags to hook up _PAGE_WIRED (and eventually
other things). So use the unused PTE bits above the PPN field as no
implementations use these for anything currently.

Now that we have _PAGE_WIRED let's provide the SH-5 functions for wiring
up TLB entries.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

Provide a new extended page flag, _PAGE_WIRED and an SH4 implementation
for wiring TLB entries and use it in the fixmap code path so that we can
wire the fixmap TLB entry.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>

Previously this was only built in for Urquell boards, but the same
approach can be used on SDK7786 now that the mode pin reading is
supported, so make it generic to SH7786.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This wires up the mode pins support on the SDK7786. The pins are
standard SH7786 pins, and all are fixed in software. Needed for the
clock framework, PCIe, and so forth.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently the secondary CPU entry point is only aimed at 29bit phys mode,
causing it to point to a stray virtual address in 32bit mode. Fix it up
after consulting with our shiny new __in_29bit_mode().
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

flush_cache_all() gets called in to when we do some early ioremapping.
Unfortunately on SDK7786 the interrupt controller itself requires
ioremapping, leading to a bit of a chicken and egg scenario. For now,
don't bother with IPI crosscalls if there aren't any other CPUs online.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This updates the existing boards that specify the register width through
platform data to use the resource flags instead. This eliminates platform
data completely in most cases, and permits further improvement in the
heartbeat driver as well as shrinking the overall private data size.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Hand off the user LEDs to the heartbeat driver.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This permits the resource access size to be handed off through the
resource flags, which saves platforms from having to establish
platform data only to specify the register width.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds support for the lis3lv02d motion sensor connected via
i2c on the Ecovec board. Tested with evtest.
Signed-off-by: NNISHIMOTO Hiroki <nishimoto.hiroki@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The last commit introduced the following breakage

arch/sh/include/asm/mmu.h: In function 'pmb_remap':
arch/sh/include/asm/mmu.h:79: error: expected ';' before '}' token

and...

arch/sh/include/asm/mmu.h:78: error: 'EINVAL' undeclared (first use in this function)
arch/sh/include/asm/mmu.h:78: error: (Each undeclared identifier is reported only once
arch/sh/include/asm/mmu.h:78: error: for each function it appears in.)
arch/sh/include/asm/mmu.h: In function 'pmb_init':
arch/sh/include/asm/mmu.h:87: error: 'ENODEV' undeclared (first use in this function)
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This stubs in some preliminary board support for the RTE SDK7786.

This is quite stunted at the moment, and primarily builds on top of the
system FPGA. FPGA IRQs are handled via CPU IRL masking for simplicity,
with initial peripheral support restricted to the debug ethernet.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Setting LC_CTYPE=C breaks localized messages in some setups. With only
LC_COLLATE=C and LC_NUMERIC=C, we get almost all we need, except for not
so defined character classes and tolower()/toupper(). The former is not
a big issue, because we can assume that e.g. [:alpha:] will always
include a-zA-Z and we only ever process ASCII input. The latter seems
only affect arch/sh/tools/gen-mach-types, which we can handle separately.

So after this patch the meaning of ranges like [a-z], the behavior of
sort and join, etc. should be the same everywhere and at the same time
gcc should be able to print localized waring and error messages.
LC_NUMERIC=C might not be necessary, but setting it doesn't hurt.
Reported-by: NSimon Horman <horms@verge.net.au>
Reported-by: NSergei Trofimovich <slyfox@inbox.ru>
Acked-by: NH. Peter Anvin <hpa@zytor.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Tested-by: NMasami Hiramatsu <mhiramat@redhat.com>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

These were originally named _nopmd and _pmd to follow their asm-generic
counterparts, but we rename them to -2level and -3level for general
consistency.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

All SH-X2 and SH-X3 parts support an extended TLB mode, which has been
left as experimental since support was originally merged. Now that it's
had some time to stabilize and get some exposure to various platforms,
we can drop it as an option and default enable it across the board.

This is also good future proofing for newer parts that will drop support
for the legacy TLB mode completely.

This will also force 3-level page tables for all newer parts, which is
necessary both for the varying page sizes and larger memories.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This stubs out all of the PxSEGADDR() wrappers for non-legacy code.
29-bit will continue to work with these, while 32-bit code will now blow
up on compile rather than at runtime.

The vast majority of the in-tree offenders are gone, with the only
remaining culprits being unable to support 32-bit mode.

Hopefully this will prevent anyone from ever using these again.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Valid sizes include 256kB, not 258kB.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This introduces some much overdue chainsawing of the fixed PMB support.
fixed PMB was introduced initially to work around the fact that dynamic
PMB mode was relatively broken, though they were never intended to
converge. The main areas where there are differences are whether the
system is booted in 29-bit mode or 32-bit mode, and whether legacy
mappings are to be preserved. Any system booting in true 32-bit mode will
not care about legacy mappings, so these are roughly decoupled.

Regardless of the entry point, PMB and 32BIT are directly related as far
as the kernel is concerned, so we also switch back to having one select
the other.

With legacy mappings iterated through and applied in the initialization
path it's now possible to finally merge the two implementations and
permit dynamic remapping overtop of remaining entries regardless of
whether boot mappings are crafted by hand or inherited from the boot
loader.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The mass produced cuts use an updated PVR value, add them to the list.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This makes vmlinux.bin generation an explicit make target, as opposed to
just a dependency for some of the other targets.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Plugs in LZO along with the others.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The legacy P2 area may not always be mapped (for example when using
PMB). So perform an icbi on an address that we know will always be
mapped.
Signed-off-by: NMatt Fleming <matt@console-pimps.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This follows the x86 xstate changes and implements a task_xstate slab
cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.

This also tidies up and consolidates some of the SH-2A/SH-4 FPU
fragmentation. Now fpu state restorers are commonly defined, with the
init_fpu()/fpu_init() mess reworked to follow the x86 convention.
The fpu_init() register initialization has been replaced by xstate setup
followed by writing out to hardware via the standard restore path.

As init_fpu() now performs a slab allocation a secondary lighterweight
restorer is also introduced for the context switch.

In the future the DSP state will be rolled in here, too.

More work remains for math emulation and the SH-5 FPU, which presently
uses its own special (UP-only) interfaces.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently this has a BUG_ON() for failure cases, as powerpc does. Switch
this over to a SLAB_PANIC instead.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>