1. 08 12月, 2009 1 次提交
  2. 01 12月, 2009 1 次提交
  3. 06 11月, 2009 2 次提交
    • C
      drm/i915: debugfs interface to manually reset the GPU · f3cd474b
      Chris Wilson 提交于
      Create a /debug/dri/%d/i915_wedged file to display the current wedged
      status, and to enable setting that value. On an i965, this will also
      trigger a GPU reset.
      
      Useful in order to attempt to recover from some error conditions that
      are not currently caught by the automatic hang detection code.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      f3cd474b
    • C
      drm/i915: Avoid potential sleep whilst holding spinlock · ba86bf8b
      Chris Wilson 提交于
      Miles Lane reported the following error:
      2 locks held by cat/4179:
        #0:  (&p->lock){+.+.+.}, at: [<c10a3884>] seq_read+0x25/0x315
        #1:  (&dev_priv->mm.active_list_lock){+.+...}, at: [<c119a854>]
      i915_batchbuffer_info+0x2b/0x124
      Pid: 4179, comm: cat Not tainted 2.6.32-rc5-git1 #2
      Call Trace:
        [<c104874f>] ? __debug_show_held_locks+0x1e/0x20
        [<c1023fb0>] __might_sleep+0xf0/0xf7
        [<c101c393>] kmap+0x17/0x58
        [<c119a8d6>] i915_batchbuffer_info+0xad/0x124
        [<c10a39bf>] seq_read+0x160/0x315
        [<c108fb8c>] ? rw_verify_area+0x98/0xbb
        [<c10a385f>] ? seq_read+0x0/0x315
        [<c1090331>] vfs_read+0x75/0xa9
        [<c10903f9>] sys_read+0x3b/0x5d
        [<c1002a8f>] sysenter_do_call+0x12/0x36
      
      The fix is relatively simple, use the atomic variants of kmap() that
      avoid the potential sleep.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Miles Lane <miles.lane@gmail.com>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      ba86bf8b
  4. 18 9月, 2009 1 次提交
  5. 07 9月, 2009 1 次提交
    • C
      drm/i915: Pad ringbuffer with NOOPs before wrapping · 0ef82af7
      Chris Wilson 提交于
      According to the docs, the ringbuffer is not allowed to wrap in the middle
      of an instruction.
      
      G45 PRM, Vol 1b, p101:
        While the “free space” wrap may allow commands to be wrapped around the
        end of the Ring Buffer, the wrap should only occur between commands.
        Padding (with NOP) may be required to follow this restriction.
      
      Do as commanded.
      
      [Having seen bug reports where there is evidence of split commands, but
      apparently the GPU has continued on merrily before a bizarre and untimely
      death, this may or may not fix a few random hangs.]
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      CC: Eric Anholt <eric@anholt.net>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      0ef82af7
  6. 05 9月, 2009 3 次提交
  7. 14 7月, 2009 1 次提交
  8. 08 7月, 2009 2 次提交
  9. 02 7月, 2009 1 次提交
  10. 18 6月, 2009 1 次提交
  11. 09 4月, 2009 1 次提交
    • B
      drm/i915: Implement batch and ring buffer dumping · 6911a9b8
      Ben Gamari 提交于
      We create a debugfs node (i915_ringbuffer_data) to expose a hex dump
      of the ring buffer itself.  We also expose another debugfs node
      (i915_ringbuffer_info) with information on the state (i.e. head, tail
      addresses) of the ringbuffer.
      
      For batchbuffer dumping, we look at the device's active_list, dumping
      each object which has I915_GEM_DOMAIN_COMMAND in its read
      domains. This is all exposed through the dri/i915_batchbuffers debugfs
      file with a header for each object (giving the objects gtt_offset so
      that it can be matched against the offset given in the
      BATCH_BUFFER_START command.
      Signed-off-by: NBen Gamari <bgamari@gmail.com>
      Signed-off-by: NCarl Worth <cworth@cworth.org>
      Signed-off-by: NEric Anholt <eric@anholt.net>
      6911a9b8
  12. 02 4月, 2009 1 次提交
  13. 28 3月, 2009 5 次提交
  14. 13 3月, 2009 4 次提交