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  1. 10 5月, 2007 4 次提交
    • B
      ide: make /proc/ide/ optional · ecfd80e4
      由 Bartlomiej Zolnierkiewicz 提交于 
      All important information/features should be already available through
sysfs and ioctl interfaces.

Add CONFIG_IDE_PROC_FS (CONFIG_SCSI_PROC_FS rip-off) config option,
disabling it makes IDE driver ~5 kB smaller (on x86-32).

While at it add CONFIG_PROC_FS=n versions of proc_ide_{create,destroy}()
and remove no longer needed #ifdefs.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      ecfd80e4
    • B
      ide: add ide_tune_dma() helper · 29e744d0
      由 Bartlomiej Zolnierkiewicz 提交于 
      After reworking the code responsible for selecting the best DMA
transfer mode it is now possible to add generic ide_tune_dma() helper.

Convert some IDE PCI host drivers to use it (the ones left need more work).
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      29e744d0
    • B
      ide: rework the code for selecting the best DMA transfer mode (v3) · 2d5eaa6d
      由 Bartlomiej Zolnierkiewicz 提交于 
      Depends on the "ide: fix UDMA/MWDMA/SWDMA masks" patch.

* add ide_hwif_t.udma_filter hook for filtering UDMA mask
  (use it in alim15x3, hpt366, siimage and serverworks drivers)
* add ide_max_dma_mode() for finding best DMA mode for the device
  (loosely based on some older libata-core.c code)
* convert ide_dma_speed() users to use ide_max_dma_mode()
* make ide_rate_filter() take "ide_drive_t *drive" as an argument instead
  of "u8 mode" and teach it to how to use UDMA mask to do filtering
* use ide_rate_filter() in hpt366 driver
* remove no longer needed ide_dma_speed() and *_ratemask()
* unexport eighty_ninty_three()

v2:
* rename ->filter_udma_mask to ->udma_filter
  [ Suggested by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]

v3:
* updated for scc_pata driver (fixes XFER_UDMA_6 filtering for user-space
  originated transfer mode change requests when 100MHz clock is used)
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      2d5eaa6d
    • B
      ide: fix UDMA/MWDMA/SWDMA masks (v3) · 18137207
      由 Bartlomiej Zolnierkiewicz 提交于 
      * use 0x00 instead of 0x80 to disable ->{ultra,mwdma,swdma}_mask
* add udma_mask field to ide_pci_device_t and use it to initialize
  ->ultra_mask in aec62xx, cmd64x, pdc202xx_{new,old} and piix drivers
* fix UDMA masks to match with chipset specific *_ratemask()
  (alim15x3, hpt366, serverworks and siimage drivers need UDMA mask
   filtering method - done in the next patch)

v2:
* piix: fix cable detection for 82801AA_1 and 82372FB_1
  [ Noticed by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]
* cmd64x: use hwif->cds->udma_mask
  [ Suggested by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]
* aec62xx: fix newly introduced bug - check DMA status not command register
  [ Noticed by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]

v3:
* piix: use hwif->cds->udma_mask
  [ Suggested by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ]
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      18137207
  3. 07 5月, 2007 1 次提交
  5. 06 5月, 2007 13 次提交
    • S
      hpt366: don't check enablebits for HPT36x · fdb0d72b
      由 Sergei Shtylyov 提交于 
      HPT36x chip don't seem to have the channel enable bits, so prevent the IDE core
from checking them...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Michal Kepien <michal.kepien@poczta.onet.pl>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      fdb0d72b
    • B
      siimage: fix wrong ->swdma_mask · 8e60d376
      由 Bartlomiej Zolnierkiewicz 提交于 
      This driver doesn't support SWDMA so use the correct ->swdma_mask.

While at it:

* no need to call config_chipset_for_pio() in config_chipset_for_dma(),
  if DMA is not available config_chipset_for_pio() will be called
  by siimage_config_drive_for_dma() and if DMA is available
  config_siimage_chipset_for_pio() will be called by siimage_tune_chipset()

* remove needless config_chipset_for_pio() wrapper

* bump driver version
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      8e60d376
    • B
      it821x: PIO mode setup fixes · 0e9b4e53
      由 Bartlomiej Zolnierkiewicz 提交于 
      * limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
  to setup PIO5 by it821x_tuneproc() could result in incorrect PIO timings
  + incorrect base clock being set for controller in the passthrough mode

* move code limiting max PIO according to the pair device capabilities from
  config_it821x_chipset_for_pio() to it821x_tuneproc() so the check is also
  applied for mode change requests coming through ->tuneproc and ->speedproc
  interfaces

* set device speed in it821x_tuneproc()

* in it821x_tune_chipset() call it821x_tuneproc() also if the controller is
  in the smart mode (so the check for pair device max PIO is done)

* rename it821x_tuneproc() to it821x_tune_pio(), then add it821x_tuneproc()
  wrapper which does the max PIO mode check;  it worked by the pure luck
  previously, pio[4] and pio_want[4] arrays were used with index == 255
  so random PIO timings and base clock were set for the controller in the
  passthrough mode, thankfully PIO timings and base clock were corrected
  later by config_it821x_chipset_for_pio() call (but it was not called for
  PIO-only devices during resume and for user requested PIO autotuning)

* remove config_it821x_chipset_for_pio() call from config_chipset_for_dma()
  as the driver sets ->autotune to 1 and ->tuneproc does the proper job now

* convert the last user of config_it821x_chipset_for_pio() to use
  it821x_tuneproc(drive, 255) and remove no longer needed function

While at it:

* fix few comments

* bump driver version
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      0e9b4e53
    • B
      pdc202xx_new: enable DMA for all ATAPI devices · 247b03f8
      由 Bartlomiej Zolnierkiewicz 提交于 
      There is no reason to limit DMA to ide_cdrom type devices.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      247b03f8
    • B
      alim15x3: PIO fallback fix · 072cdcbb
      由 Bartlomiej Zolnierkiewicz 提交于 
      If DMA tuning fails always set the best PIO mode.
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      072cdcbb
    • S
      aec62xx: fix PIO/DMA setup issues · 826a1b65
      由 Sergei Shtylyov 提交于 
      Teach the driver's tuneproc() method to do PIO auto-runing properly since it
treated 5 instead of 255 as auto-tune request, and also passed the mode limit
of PIO5 to ide_get_best_pio_mode() despite supporting up to PIO4 only.

While at it, also:

- remove the driver's wrong claim about supporting SWDMA modes;

- stop hooking ide_dma_timeout() method as the handler clearly doesn't fit for
  the task...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      826a1b65
    • S
      cmd64x: use interrupt status from MRDMODE register (take 2) · 66602c83
      由 Sergei Shtylyov 提交于 
      Fold the parts of the ide_dma_end() methods identical to __ide_dma_end() into a
mere call to it.
Start using faster versions of the ide_dma_end() and ide_dma_test_irq() methods
for the PCI0646U and newer chips that have the duplicate interrupt status bits
in the I/O mapped MRDMODE register, determing what methods to use at the driver
load time. Do some cleanup/renaming in the "old" ide_dma_test_irq() method too.
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      66602c83
    • S
      cmd64x: procfs code fixes/cleanups (take 2) · 5826b318
      由 Sergei Shtylyov 提交于 
      Fix several issues with the driver's procfs output:

- when testing if channel is enabled, the code looks at the "simplex" bits, not
  at the real enable bits -- add #define for the primary channel enable bit;

- UltraDMA modes 0, 1, 3 for slave drive reported incorrectly due to using the
  master drive's clock cycle resolution bit.

While at it, also perform the following cleanups:

- don't print extra newline before the first controller's dump;

- correct the chipset names (from CMDxxx to PCI-xxx)

- don't read from the registers which aren't used for dump;

- better align the table column sizes;

- rework UltraDMA mode dump code;

- remove PIO mode dump code that has never been finished;

- remove the duplicate interrupt status (the MRDMODE register bits mirror those
  those in the CFR and ARTTIM23 registers) and fold the dump into single line;

- correct the style of the ?: operators...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      5826b318
    • S
      cmd64x: add/fix enablebits (take 2) · 7accbffd
      由 Sergei Shtylyov 提交于 
      The IDE core looks at the wrong bit when checking if the secondary channel is
enabled on PCI0646 -- CNTRL register bit 7 is read-ahead disable, bit 3 is the
correct one.
Starting with PCI0646U chip, the primary channel can also be enabled/disabled --
so, add 'enablebits' initializers to each 'ide_pci_device_t' structure, handling
the original PCI0646 via adding the init_setup() method and clearing the 'reg'
field there if necessary...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      7accbffd
    • S
      cmd64x: interrupt status fixes (take 2) · e51e2528
      由 Sergei Shtylyov 提交于 
      The driver's ide_dma_test_irq() method was reading the MRDMODE register even on
PCI0643/6 where it was write-only -- fix this by always reading the "backward-
compatible" interrupt bits, renaming dma_alt_stat to irq_stat as the interrupt
status bits are not coupled to DMA.
In addition, wrong interrupt bit was tested/cleared for the primary channel --
it's bit 2 in all the chip specs and the driver used bit 1... :-/
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      e51e2528
    • S
      cmd64x: fix multiword and remove single-word DMA support · 60e7a82f
      由 Sergei Shtylyov 提交于 
      Fix the multiword DMA and drop the single-word DMA support (which nobody will
miss, I think).  In order to do it, a number of changes was necessary:

- rename program_drive_counts() to program_cycle_times(), pass to it cycle's
  total/active times instead of the clock counts, and convert them into the
  active/recovery clocks there instead of cmd64x_tune_pio() -- this causes
  quantize_timing() to also move;

- contrarywise, move all the code handling the address setup timing into
  cmd64x_tune_pio(), so that setting MWDMA mode wouldn't change address setup;

- remove from the speedproc() method the  bogus code pretending to set the DMA
  timings by twiddling bits in the BMIDE status register, handle setting MWDMA
  by just calling program_cycle_times(); while at it, improve the style of that
  whole switch statement;

- stop fiddling with the DMA capable bits in the speedproc() method -- they do
  not enable DMA, and are properly dealt with by the dma_host_{on,off} methods;

- don't set hwif->swdma_mask in the init_hwif() method anymore.

In addition to those changes, do the following:

- in cmd64x_tune_pio(), when writing to ARTTIM23 register preserve the interrupt
  status bit, eliminate local_irq_{save|restore}() around this code as there's
  *no* actual race with the interrupt handler, and move cmdprintk() to a more
  fitting place -- after ide_get_best_pio_mode() call;

- make {arttim|drwtim}_regs arrays single-dimensional, indexed with drive->dn;

- rename {setup|recovery}_counts[] into more fitting {setup|recovery}_values[];

- in  the speedproc() method, get rid of the duplicate reads/writes from/to the
  UDIDETCRx registers and of the extra variable used to store the transfer mode
  value after filtering,  use another method of determining master/slave drive,
  and cleanup useless parens;

- beautify cmdprintk() output here and there.

While at it, remove meaningless comment about the driver being used only on
UltraSPARC and long non-relevant RCS tag. :-)
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      60e7a82f
    • S
      sl82c105: DMA support code cleanup (take 4) · 688a87d1
      由 Sergei Shtylyov 提交于 
      Fold the now equivalent code in the ide_dma_check() method into a mere call to
ide_use_dma().  Make config_for_dma() return non-zero if DMA mode has been set
and call it from the ide_dma_check() method instead of ide_dma_on().
Defer writing the DMA timings to the chip registers until DMA is really turned
on (and do not enable IORDY for DMA).
Remove unneeded code from the init_hwif() method, improve its overall looks.
Rename the dma_start(), ide_dma_check(), and ide_dma_lostirq() methods, and
also use more proper hwif->dma_command, fix printk() and comment in the latter
one as well.  While at it, cleanup style in several places.
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      688a87d1
    • S
      sl82c105: rework PIO support (take 2) · e93df705
      由 Sergei Shtylyov 提交于 
      Get rid of the 'pio_speed' member of 'ide_drive_t' that was only used by this
driver by storing the PIO mode timings in the 'drive_data' instead -- this
allows us to greatly  simplify the process of "reloading" of the chip's timing
register and do it right in sl82c150_dma_off_quietly() and to get rid of two
extra arguments to config_for_pio() -- which got renamed to sl82c105_tune_pio()
and now returns a PIO mode selected, with ide_config_drive_speed() call moved
into the tuneproc() method, now called sl82c105_tune_drive() with the code to
set drive's 'io_32bit' and 'unmask' flags in its turn moved to its proper place
in the init_hwif() method.
Also, while at it, rename get_timing_sl82c105() into get_pio_timings() and get
rid of the code in it clamping cycle counts to 32 which was both incorrect and
never executed anyway...
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      e93df705
  7. 24 4月, 2007 1 次提交
  9. 21 4月, 2007 2 次提交
  11. 13 4月, 2007 1 次提交
  13. 27 3月, 2007 1 次提交
    • A
      pdc202xx_new: Enable ATAPI DMA · 362ebd83
      由 Albert Lee 提交于 
      [ bart: the ressurection of 2 years old patch which slipped thru the cracks
  (thanks to Sergei Shtylyov for finding it) ]

These is the patch to turn on pdc202xx_new for ATAPI DMA.  When testing, it
works fine without the (request_bufflen % 256) workaround as needed in libata.
ide-scsi filters out (pc->request_transfer % 1024) and use PIO, so the pdc202xx
ATAPI DMA problem is avoid.  Both ide-cd and ide-scsi won't hit the ATAPI DMA
problem on pdc202xx_new.
Signed-off-by: NAlbert Lee <albertcc@tw.ibm.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      362ebd83
  15. 18 3月, 2007 3 次提交
  17. 04 3月, 2007 7 次提交
  19. 17 2月, 2007 7 次提交