Add timeout wait for palette loadind to complete. We do not want to
hang forever if palette loaded interrupt does not arrive for some
reason.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

The LCDC revision 2 documentation also mentions the mandatory palette
for true color modes. Even if the rev 2 LCDC appears to work just fine
without the palette being loaded loading it helps in testing the
feature.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Set LCDC_PALETTE_LOAD_MODE bit-field with new tilcdc_write_mask()
instead of tilcdc_set(). Setting a bit-fields with tilcdc_set() is
fundamentally broken.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Failed tilcdc_crtc_create() error handling was broken, this patch
should fix it.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Revision 1 of the IP doesn't work if we don't load the palette (even
if it's not used, which is the case for the RGB565 format).

Add a function called from tilcdc_crtc_enable() which performs all
required actions if we're dealing with a rev1 chip.
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Revision 1 LCDC support also sync lost errors and can benefit from
sync lost recovery routine.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Recover from sync lost error flood by resetting the LCDC instead of
turning off the SYNC_LOST error IRQ. When LCDC starves on limited
memory bandwidth it may sometimes result an error situation when the
picture may have shifted couple of pixels to right and SYNC_LOST
interrupt is generated on every frame. LCDC main reset recovers from
this situation and causes a brief blanking on the screen.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Tested-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Fix race from forced shutdown of crtc in unload by adding internal
locking and a boolean telling if device is going to be shutdown.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Use unload to handle initialization failures instead of complex goto
label mess. To do this the initialization sequence needed slight
reordering and some unload functions needed to become conditional.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

This error message will be printed when a FIFO underflow irq has
triggered. Since this happens sometimes and the error message will be
displayed on the console, it should have a correct spelling.
Signed-off-by: NDaniel Schultz <d.schultz@phytec.de>
Signed-off-by: NJyri Sarha <jsarha@ti.com>

The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address")
added an adjustment of the FB_CEILING address. This is done by decrementing
the address by one.

On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the
display border, because the ceiling address is 8f276fff instead of
8f277000. Since this adjustment isn't necessary for the LCDC v2, the
origin ceiling address should be used.
Signed-off-by: NDaniel Schultz <d.schultz@phytec.de>
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Some architectures don't use the common clock framework and don't
implement all the clk interfaces for every clock. This is the case
for da850-lcdk where clk_set_rate() only works for PLL0 and PLL1.

Trying to set the clock rate for the LCDC clock results in -EINVAL
being returned.

As a workaround for that: if the call to clk_set_rate() fails, fall
back to adjusting the clock divider instead. Proper divider value is
calculated by dividing the current clock rate by the required pixel
clock rate in HZ.

This code is based on a hack initially developed internally for
baylibre by Karl Beldan <kbeldan@baylibre.com>.

Tested with a da850-lcdk with an LCD display connected over VGA.
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NJyri Sarha <jsarha@ti.com>

The driver needs the number of bytes per pixel, not the bpp and depth
info meant for fbdev compatibility. Use the right API.

In the tilcdc_crtc_mode_set() function compute the hardware register
value directly from the pixel format instead of computing the number of
bits per pixels first.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NArchit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1476744081-24485-7-git-send-email-laurent.pinchart@ideasonboard.com

Also reorder alphabetically and fix up drm_flip_work header.
Reviewed-by: NDaniel Vetter <daniel@ffwll.ch>
Signed-off-by: NSean Paul <seanpaul@chromium.org>

WARN if CRTC is touched without CRTC lock. The crtc functions should
not be called simultaneously from multiple threads. Having the DRM
CRTC lock should take care of that.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Take CRTC lock when calling tilcdc_crtc_disable() in
tilcdc_crtc_destroy().

In theory there could still be some operation ongoing, which should
finish before destroying the CRTC. However, the main reason for
adding this is to be able to add WARNing in tilcdc_crtc_disable() if
CRTC is not locked.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Flush flip-work workqueue before drm_flip_work_cleanup(). It causes a
nasty warning if there is unfinished flip-work in the queue when
drm_flip_work_cleanup() is called. The flush_workqueue() has to be
called before drm_crtc_cleanup() for unref_worker() to be able to do
its job.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Clean up LCDC functional clock rate setting code.

The LCDC functional clock is set by two functions: mode_set_nofb() and
cpufreq_transition().

When tilcdc_crtc_mode_set_nofb() is called in atomic commit phase the
drm atomic helpers have taken all the necessary drm locks and turned
off the crtc, while tilcdc_commit() is keeping LCDC powered on. For
mode_set_nofb() just a simple clock setting function without any
locking or power management code is enough. The new tilcdc_crtc_set_clk()
is implemented for that purpose.

cpufreq_transition() on the other hand is called from outside DRM and
it needs to take the necessary locks and turn off the CRTC while
keeping the LCDC powered. The reimplemented tilcdc_crtc_update_clk()
is for that purpose and it uses the new tilcdc_crtc_set_clk() to
actually set the clock.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Write DMA base and ceiling address with a single instruction, if
available. This should make it more unlikely that LCDC would fetch the
DMA addresses in the middle of an update. Having bad combination of
addresses in dma base and ceiling (e.g base > ceiling) can cause
unpredictaple behavior in LCDC.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Reviewed-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

This got accidentally dropped in the fixed commit and is required for
the driver to properly work on the rev1 IP, such as found on the LCDK.

Fixes: 2b2080d7 ("drm/tilcdc: Get rid of complex ping-pong mechanism")
Signed-off-by: NKarl Beldan <kbeldan@baylibre.com>
Signed-off-by: NJyri Sarha <jsarha@ti.com>

The LCDC seems to expect its framebuffer ceiling address pointer to be
an inclusive bound.  The IP rev2 seems to cope with that but rev1 (as
found on the LCDK) don't.
Also note that this is what the framebuffer code does in da8xx-fb.c.

Since, as the TRM puts it, "The 2 LSBs are hardwired to 00b", the
dma_addr_t can be decremented without cast.
I tested it with a v2 (AM335x, rev  0x4F201000) and an LCDK (v1).
Signed-off-by: NKarl Beldan <kbeldan@baylibre.com>
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Change tilcdc_crtc_page_flip() to tilcdc_crtc_update_fb(). The
function is not used as a page_flip() callback anymore so it is only
confusing to call it that. The function should only be used by dummy
primary plane commit() callback.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Remove unnecessary pm_runtime_get() and *_put() calls from commit
phase callbacks. Those calls are not needed since we have the whole
commit phase between pm_runtime_get_sync() and pm_runtime_put_sync().
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Get rid of legacy dpms mechanism. This simplifies the code quite a
bit. The old start() and stop() functions become tilcdc_crtc_enable()
and *_disable(). The functions are added with all the necessary
mechanisms from the old dpms function and they are used directly as
the crtc helper enable() and disable() callbacks.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Enable and disable interrupts in crtc start() and stop(). None of the
interrupts can fire if CRTC is disabled, so it is cleaner - when
considering suspend/resume code etc. - to enable the interrupts when
CRTC is turned on and to disable them when CRTC is turned off.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Remove tilcdc_verify_fb(). The tilcdc_verify_fb() function is not
needed because the same checks are implemented in
tilcdc_plane_atomic_check().
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Remove obsolete crtc helper functions. These are not needed when
atomic modeset is used.

Note that the drm_crtc_helper_funcs mode_fixup() is still needed. The
crtc's check() callback can not do its job here.

The plane's check() callback needs to set drm_crtc_state's
->mode_changed to true if the pixel format for the framebuffer
changes. Because of this drm_mode_config_funcs atomic_check() callback
needs to call drm_atomic_helper_check_modeset() once more after it has
called drm_atomic_helper_check_planes(). If the fixing of the
adjusted_mode would be done in drm_crtc_helper_funcs atomic_check()
callback, it would get over written by the extra
drm_atomic_helper_check_modeset() call.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Set DRIVER_ATOMIC and use atomic helpers and rename commit and prepare
crtc helpers to enable and disable. This makes the final jump to mode
setting, but there is lot of obsolete code to clean up.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Add tilcdc_crtc_atomic_check(). Checks the display mode validity and
the presence of the mandatory primary plane.

The drm_crtc_helper_funcs mode_fixup() callback is left untouched and
the check function does no try to do its job on purpose, despite what
the mode_fixup() callback's documentations suggests.

The plane's check() callback needs to set drm_crtc_state's
->mode_changed to true if the pixel format for the framebuffer
changes. Because of this drm_mode_config_funcs atomic_check() callback
needs to call drm_atomic_helper_check_modeset() once more after it has
called drm_atomic_helper_check_planes(). If the fixing of the
adjusted_mode would be done in drm_crtc_helper_funcs atomic_check()
callback, it would get over written by the extra
drm_atomic_helper_check_modeset() call.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Add tilcdc_crtc_mode_set_nofb(). The mode_set_nofb() semantics do not
fit well to LCDC, because of the mandatory framebuffer. However, when
the primary plane is required in the check phase, it and the
framebuffer can be found from the atomic state struct.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Initialize dummy primary plane from crtc init.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Make tilcdc_crtc_page_flip() work if crtc is not yet on. The plane
commit sometimes comes before crtc is turned on. The new framebuffer
should be set to scanout also in that case, so that it is there when
crtc is turned on at the end of the commit phase.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Make tilcdc_crtc_page_flip() public for dummy plane implementation to use.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Add drm_crtc_vblank_on() and *_off() calls to start() and stop()
functions, to make sure any vblank waits etc. gets properly cleaned
up.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Increase time out for waiting frame done interrupt. 50ms is long
enough for the usual display modes (50 Hz or higher refresh rate), but
it may be a bit tight for some unusual mode.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Move wait queue waiting of LCDC_FRAME_DONE IRQ from tilcdc_crtc_dpms()
into stop() function. This is just a cleanup and enables independent
use of stop() function.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Reorder the IRQ function so that the write to LCDC_END_OF_INT_IND_REG
is done last. The write to LCDC_END_OF_INT_IND_REG indicates to LCDC
that the interrupt service routine has completed (see section
13.3.6.1.6 in AM335x TRM). This is needed if LCDC's ipgvmodirq module
is configured for pulse interrupts.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Move LCDC_SYNC_LOST handling inside if (ver == 2) statement.
LCDC_SYNC_LOST interrupt status bit is only defined for version 2
silicon.
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Restore old dpms state in pm_resume(). The dpms is turned off in
pm_suspend() and it should be restored to its original state in
pm_resume(). Without this patch the display is left blanked after a
suspend/resume cycle.

Fixes commit 614b3cfe ("drm/tilcdc: disable the lcd controller/dma
engine when suspend invoked")
Signed-off-by: NJyri Sarha <jsarha@ti.com>

Remove legacy usage of drm_handle_vblank()
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1467677092-5089-6-git-send-email-gustavo@padovan.org