- 19 3月, 2014 3 次提交
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由 Peter Tyser 提交于
Some newer Atom CPUs, eg Avoton and Bay Trail, use slightly different register layouts for the iTCO than the current v1 and v2 iTCO. Differences from previous iTCO versions include: - The ACPI space is enabled in the "ACPI base address" register instead of the "ACPI control register" - The "no reboot" functionality is set in the "Power Management Configuration" register instead of the "General Control and Status" (GCS) register or PCI configuration space. - The "ACPI Control Register" is not present on v3. The "Power Management Configuration Base Address" register resides at the same address is Avoton/Bay Trail. To differentiate these newer chipsets create a new v3 iTCO version and update the MFD driver to support them. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com> Tested-by: NRajat Jain <rajatjain@juniper.net> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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由 Vincent Donnefort 提交于
Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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由 Vincent Donnefort 提交于
All those IDs are arbitrary and so can be encapsulated into an enumeration. Signed-off-by: NVincent Donnefort <vdonnefort@gmail.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 14 9月, 2012 1 次提交
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由 Jean Delvare 提交于
The ICH chips have their GPIO pins organized in 2 or 3 independent groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make use of pins in one group, preventing the OS to access these. This does not prevent the OS from accessing the other group(s). This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS wants to control GPIO 18 (group 1), while I (the OS) need to control GPIO 52 and 53 (group 2) for SMBus multiplexing. So instead of checking for ACPI resource conflict on the whole I/O range, check on a per-group basis, and consider it a success if at least one of the groups is available for the OS to use. Signed-off-by: NJean Delvare <khali@linux-fr.org> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Aaron Sierra <asierra@xes-inc.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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- 09 5月, 2012 1 次提交
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由 Aaron Sierra 提交于
This patch converts the iTCO_wdt driver to use the multi-function device driver model. It uses resources discovered by the lpc_ich driver, so that it no longer does its own PCI scanning. Signed-off-by: NAaron Sierra <asierra@xes-inc.com> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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- 01 5月, 2012 1 次提交
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由 Aaron Sierra 提交于
This driver currently creates resources for use by a forthcoming ICH chipset GPIO driver. It could be expanded to create the resources for converting the esb2rom (mtd) and iTCO_wdt (wdt), and potentially more, drivers to use the mfd model. Signed-off-by: NAaron Sierra <asierra@xes-inc.com> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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