Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

MX53 has five UART ports.

Add support for the missing UART4 and UART5 ports.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Mark the actual interrupt source for some interrupts currently marked as reserved.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

MX53 has 4 chip selects (CS0 - CS3) and the valid combinations are:

- CS0 (128MB)
- CS0 (64MB), CS1 (64MB)
- CS0 (64MB), CS1 (32MB), CS2 (32MB)
- CS0 (32MB), CS1 (32MB), CS2 (32MB) , CS3 (32MB)

Fix these addresses and also take into account all the four possibilities.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Having the silicon revision to appear on the boot log is a useful information.

MX31, MX35 and MX51 already show the silicon revision on boot.

Add support for displaying such information for MX53 as well.

Tested on a mx53loco board, where it shows:

CPU identified as i.MX53, silicon rev 2.0
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
LAKML-Reference: 1301068367-18937-1-git-send-email-fabio.estevam@freescale.com
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. some macro definitions fix
2. add platform data for spi device
3. register spi clocks
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. changes some register address to fit macro definition
2. add platform data and clock for sdhc
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. Adjust FEC base address name to fit macro definition
2. Add platform data and reset function for FEC
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>